Arm internal BIG family detailed---embedded regression fourth

To learn arm, first of all, ARM has a general understanding of the macro! It will be easier to learn in the back!

Common familiar is generally divided into:

1. Chip: 6410 210 2440 (all of the three are Samsung)

2. Arm Core: ARM11 A8 ARM9

3. Instruction Architecture: ARMV7 ARMV6

First, some of the terms of arm's big family:

The above diagram simplifies some of the distinctions between arm internals:

The following is a simple look at the s3c2440 chip architecture diagram:

From the above chip architecture diagram can be seen as part of the ARM9TDMI (processor core) chip core, this part is the ARM9 core, so that the chip and the arm of the core link up!

In the same 6410, it can be seen that the nucleus of ARM11, 210 is the nucleus of cotexA8.

Let's look at the relationship between arm core and ARM instruction architecture below! From the s3c2440 arm Nuclear Handbook, you can find this passage.

You can see that the ARM9 used by s3c2440 is ARMV4T (where V4 represents VERSIONS4), that is, the ARMV4 instruction architecture

Similarly, the same method can be consulted ARM11 's core is the armv6t instruction architecture version, A8 's kernel adopts the ARMV7 instruction architecture!

The most important thing in a chip is the arm core! Learn about the arm core below!

Cortex-m series mostly used in industrial control, in fact, is a single-chip microcomputer, but compared to the performance of a single-chip computer so a little!

The Cortex-r series is commonly used in applications where real-time requirements are strong!

CORTEX-A Series for multimedia applications, such as our use of mobile phones and other high-end embedded devices!

Some of the more important comparison parameters between the different chips:

1. Processing speed (generally referred to by configuration in a range of selectable speed range)

2. Caching

3. Memory interface (what memory is supported directly determines chip performance)

4. Supported OS

5. Other

This information is basically to consult the chip manual datasheet, here is not a one! Here's a note. There's a general idea in the brain!

Here is a brief introduction to your own Development Board OK6410:

Processing speed: 533~667mhz

Cache: 16KB

Memory interface: SDRAM and DDR (DDR performance is much stronger than SDRAM)

Supported Os:wince/linux/android

Other: 2440 closed discontinued 6410 is still in production (work and study can be integrated into consideration), in terms of learning, personally think that the first time to learn the best is to choose 2440 information more than the whole! Very suitable for beginners to arm people! Self-study words to find a way as long as their efforts at all no problem!

The operating mode of the ARM processor:

ARM's official book:arm Architecture Reference Manual Handbook, which is often used in the learning behind! In short is a very important datasheet

ARM's seven Modes of operation: (Remember when the interview was asked, of course, this is a very basic problem)

Here's a brief look at the difference in different modes of operation: for example, when a program runs under different modes, the instructions for the ARM processor that can be run are not the same, and the registers of the ARM processors that can be accessed are not the same!

User : normal users mode

FIQ: fast Interrupt Mode

IRQ: normal Interrupt mode

Supervisor: protected Mode (relatively high permissions)

Abort: exception mode (such as program Access exception)

Undefined: no schema defined (e.g. using an undefined assembly directive)

System : Systems Mode (only in the mode of ARMV4 above, with very few)

For Linux, a generic application runs in user mode, while the Linux kernel runs in SVC mode, which is the supervisor mode (which may be asked during an interview)

The following is a detailed description of arm registers:

First of all, let's take a look at a picture! This is still according to the above arm treasure official Datesheet, to A8, 6410,2440 are common, and these for the learning of the underlying programming, most of these registers will be used! Anyway, at least there's a ballpark in the brain!

The ARM processor has a total of PNS registers; (also very basic, interview may ask)

Below is a detailed Datesheet manual:

The translation is always:

The ARM microprocessor has a public 37 32-bit registers, of which 31 are general purpose registers and 6 bit status registers. However, these registers can not be accessed concurrently, which registers are accessible, depending on the operating state of the ARM processor and the specific operating mode. But at any time, the Universal register R14-R0, the program counter PC, and a status register are all accessible.

Arm Registers list diagram:

General-purpose registers are divided into three categories:

Non-grouped universal registers:

R0-R7 are non-grouped registers. This means that in all processor modes, access is the same physical register. The non-grouping registers are not used by the system for special purposes, and any application where universal registers can be used may use the ungrouped registers.

Group Register:

See these registers are not feeling and learning C language when you see the SP pointer, there is a learning assembly when understanding interrupt working principle is very familiar! Yes, that's him!

Program Counter :

Register R15 is used as a program counter, also known as a PC, whose value equals the currently executing instruction address +8 (because there is a decoding phase between fetch and execute)

Program Status Register:

1. CPSR

2. Spsr_svc (s in SPSR can be understood as save, which is well understood if you understand interrupt mode of operation)

3. Spsr_abt

4. Spsr_und

5. Spsr_irq

6. Spsr_fiq

CPSR has a corresponding physical register in each of the exception modes---The program state holds the register SPSR. When an exception occurs, SPSR is used to hold the value of CPSR in order to restore the working state of the exception when the exception has returned.

The program status register CPSR can be accessed by arm in all operating modes. The CPSR contains the condition code flag, interrupt stop bit, current processor mode, and other status and control information! a little bit more complicated! Remember the first time when you still on the paper to mark each of the different values to represent the meaning! Very laborious! And now it's almost forgotten!

Here is a brief introduction! It will be used in the program behind!

Some of the more important CPSR/SPSR registers are:

Arm addressing mode (here is a brief introduction to several commonly used addressing methods):

The so-called addressing method is the way that the processor finds the operands required by the instruction based on the information given in the instruction.

1. Immediate number addressing

2. Register addressing

3. Register Indirect addressing

4. Base Address Address Change address

5. Relative addressing

Arm internal BIG family detailed---embedded regression fourth