Clock configuration and clock tree resolution of 2011-03-10 17:04 STM32 clock System

First look at a STM32 clock system block diagram

In STM32, there are five clock sources, namely HSI, HSE, LSI, LSE, PLL.

HSI internal high-speed RC oscillator clock, 8mhz;hse, external high-speed clock, 4M__16MHZ;LSI, internal low-speed RC clock, 40KHZ; LSE external low-speed clock, 32.768KHZ;PLL PLL Octave, by the figure, can choose Hse/2, HSI/2, HSE, the multiplier coefficient can be 2--16, but do not exceed 72MHz.

SYSCLK system clock, by the figure can choose a HSE, HSI, PLLCLK One, up to 72MHz, through the AHB divider to each module, AHB crossover can choose 1, 2, 4, 8, 16, 64, 128, 256, 512,AHB to 5 large modules to use.

1 HCLK, which is the HCLK clock used by the AHB bus, kernel, memory, and DMA

2 system timer clock sent to cortex via 8

3 idle run clock directly to cortex FCLK

4 give the APB1 divider. The APB1 divider can be divided into 1, 2, 4, 8, 16, the output is used for APB1 peripherals (PCLK1, Maximum frequency 36MHz), and the other one timer (timer) 2, 3, 4 times frequency multiplier. The multiplier can choose 1 or twice octave, clock output for timers 2, 3, 4 use

5 give the APB2 divider. APB2 crossover can choose 1, 2, 4, 8, 16, the output of the APB2 peripheral use (PCLK2, the maximum frequency 72MHz), and the other way to the timer (timer) 1 time multiplier used. The multiplier can choose 1 or twice times, the clock output for the timer 1 use. In addition, the APB2 divider has one output for the ADC divider, which is used for the ADC module. ADC divider selectable for 2, 4, 6, 8

Note that the frequency multiplier of the timer, when the division of the APB is 1 o'clock, its multiplier value is 1, otherwise its multiplier value is 2. The devices connected to the APB1 (low Speed peripherals) are: Power Interface, Backup interface, CAN, USB, i2c1, I2C2, UART2, UART3, SPI2, window watchdog, Timer2, Timer3, Timer4. Note that the USB module requires a separate 48MHz clock signal, but it should not be a clock for the USB module to work, but simply a clock to be used by the serial Interface Engine (SIE). The clock that the USB module works on should be provided by APB1. The devices connected to the APB2 (high-speed peripherals) are: UART1, SPI1, Timer1, ADC1, ADC2, all normal IO ports (PA~PE), and the second function IO port.

With a simple own clock configuration program, use library functions.

void rcc_configuration (void)//Clock configuration
{
ErrorStatus hsestartupstatus;//Judging marker variable

Rcc_hseconfig (rcc_hse_on);//Use an external clock
Hsestartupstatus = Rcc_waitforhsestartup ();//wait for external clock to stabilize
if (hsestartupstatus== SUCCESS)//If the external crystal oscillator starts successfully
{
Rcc_hclkconfig (RCC_SYSCLK_DIV1);//HCLK (AHB clock) value equals system clock
Rcc_pclk1config (RCC_HCLK_DIV2);//pclk1 (APB1 clock) value is equal to half of HCLK, up to 36MHz
Rcc_pclk2config (RCC_HCLK_DIV1);//pclk2 (APB2 clock) value equals HCLK, maximum 72MHz
Flash_setlatency (flash_latency_2);//flash timing control, Sysclk0~24mhz latency=0.sysclk25~48mhz Latency =1.SYSCLk 48~72MHz latency=2
Flash_prefetchbuffercmd (flash_prefetchbuffer_enable);//Open FLASH prefetch function
Rcc_pllconfig (rcc_pllsource_hse_div1,rcc_pllmul_9);//hse provides system clock, 9 times octave, which is 72MHz
Rcc_pllcmd (ENABLE);//Start PLL
while (Rcc_getflagstatus (Rcc_flag_pllrdy) ==reset);//wait for the PLL to stabilize
Rcc_sysclkconfig (RCC_SYSCLKSOURCE_PLLCLK);//system clock from the PLL output
while (Rcc_getsysclksource ()!=0x08);//wait for the system clock to stabilize
}
}