CPU multitasking-interrupts vs. Polling methods

Comparison of interrupt mode and polling mode Basic concepts of interrupts

program interruption is usually referred to as interruption, refers to the CPU in the process of normal operation, due to pre-selection arrangements or the occurrence of various random internal or external events, so that the CPU interrupts the running program, and go to the corresponding service program to deal with, this process is called program interruption.

Second, the interrupt of the 80x86 microprocessor the interrupt type of the microprocessor is generally divided into 2 classes, that is, the soft interrupt caused by the execution of some instructions and the hard interrupt caused by the interrupt request signal from other control circuits outside the processor. To transfer the CPU from the main program to the Interrupt service program, you must know the entry address of the interrupt service program, that is, the interrupt vector. There are 256 interrupt vectors for PC 80x86 CPU.

General process of interruption:

The main program only handles A, B, C, data exchange when the device A,b,c data is ready. The CPU executes its own main program as usual when preparing its own data on a slower peripheral device. In this sense, the CPU and peripherals of some operations are carried out in parallel, so the serial program Query method compared to the efficiency of the computer system is greatly improved. The following figure:

The actual interrupt process is more complicated, and the following diagram shows a detailed flowchart of the interrupt processing process. When the CPU executes the current instruction, if the peripheral sends an interrupt request to the CPU, then the CPU will issue an interrupt response signal when the response condition is satisfied, while the interrupt ("Interrupt Mask" trigger "1") is stopped, indicating that the CPU is no longer accepting interrupts from another device. At this point, the CPU will look for which device the interrupt request source is. and save the contents of the CPU's own program counter (PC). It then shifts to the interrupt service program that handles the interrupt source. The CPU after saving the field information, equipment (such as text Exchange data) after. Site information will be restored. After these actions are completed, the open interrupt ("Interrupt mask" trigger is set to ' O ') and the network to the next instruction of the original interrupted main program.

(1) Although the external interrupt request is random, the CPU only accepts the interrupt request of the device after the execution of the current instruction, that is, when it is transferred to the public operation, so as not to interfere with the execution of the current instruction. A public operation is an operation performed by a CPU after an instruction is executed, such as interrupt processing, direct memory transfer, removal of a command, and so on. An external interrupt request signal is usually stored in the interrupt source latch in the interface, and connected to the CPU via an interrupt request line, and the CPU checks the interrupt request signal whenever an instruction is executed to the end. If the interrupt request signal is "1", the CPU goes to "interrupt period" and accepts external interruption. (2) In order to correctly return to the original main program interrupted breakpoint (PC content) after the interrupt service program is completed, and continue to execute the main program, the contents of the program counter PC and the state of the CPU (including the contents of the register and some status flags) will be saved to the stack after the execution of the current instruction. These operations are called save sites. (3) When the CPU response is interrupted and is about to execute the Interrupt service program, there may be another new interrupt source to make an interrupt request to it. In order not to cause confusion, there must be an interrupt masking trigger in the interrupt management part of the CPU, which can be placed under the control of the program "1" (Set the Mask), or "0" (remove the shield). The CPU can accept interrupts only if the interrupt Shield flag is "0". When a command finishes executing the CPU accepts the interrupt request and responds, it emits an interrupt response signal on the one hand, INTA, on the other hand, the interrupt shield flag "1", that is, the shutdown interrupt. In this way, the CPU can no longer accept interrupt requests from another new interrupt source. Only after the CPU has finished executing the Interrupt service program, does it reset the interrupt mask flag to "0", which is an open interrupt and returns to the main program. Therefore, the end of the interrupt service program must have two instructions, that is, the interrupt instruction and the return to the main command, while the hardware to ensure that the return to the main instruction after the execution of the new interrupt request. (4) The interrupt processing process is accomplished by combining hardware and software. As in the preceding illustration, the interrupt period is implemented by hardware, and the Interrupt service program is implemented by the machine instruction sequence. The latter, in addition to the preservation of the site, the resumption of the site, open the interruption and return to the main program task, the request for the interruption of the device service to the CPU to exchange one word of data, or other services.

Basic concepts of polling methods

Polling (Polling) I/O mode or program control I/O mode, is to let the CPU in a certain period in order to query each peripheral, to see if it has data input or output requirements, if any, then the corresponding input/output services; If none, or I/O processing completed, the CPU will then query the next peripheral.

Required Hardware: Peripheral interface provides status port, data port

Software mechanism: The application must periodically query the status port of each interface, determine whether the input, output data, if necessary, through the data port for data manipulation.

Features: The CPU is actively querying external devices by executing instructions, and external devices are in a passive position.

The image above is a general procedure. comparison of polling mode and interrupt mode Speed

Program Control Method:

Hardware Speed index: Because the "program control method" completely adopts the software to the peripheral interface, so its hardware operation is only ordinary port read and write, and there is no special, its speed index by the bus transmission speed, the speed of the port of the joint decision.

For this kind of peripheral control mode, the speed index is the key to the software.

Interrupt Handling Mode:

The interrupt processing method itself is interpreted and controlled in the same way as the atomic operation.

Just because the interrupt request and response mechanism is added, the reading of the status port becomes the reading of the interrupt number during the interrupt response, and the judgment of the state port becomes the determination of the interrupt entry address.

In essence, the interrupt processing mode and the program control method itself speed index consistent, there is no big difference. Reliability

Program Control Method:

Because the hardware does not support the interrupt mode, the operating system will not be able to recover the CPU control (no timer interrupt) as long as the application does not return CPU control to the application after the OS has given the CPU control. Both the application and the operating system are software modules, the operating system is the core module, they have the relationship between the handover CPU control. It is because of this relationship that the operating system will never be able to regain control of the system once the application has a deadlock when it uses the externally programmed mode. The fault of the application is affected by the peripheral control mode to the operating system as the core module, so the correlation reliability Index of "program control mode" is very low according to the calculation of the correlation reliability Index.

Interrupt Handling Mode:

Due to a timed interrupt, the operating system can regain control of the CPU through the Interrupt service program after the application's current time slice ends. Application failures do not ripple to the operating system, so the correlation reliability metric for interrupt handling is high. Scalability

Program Control Method:

Since all applications include operations on ports, once the design of the hardware interface changes, all applications must be modified, which increases the cost of modification many times. Therefore, the program control method will make the relevant hardware module local modification indicator is relatively low.

Interrupt Handling Mode:

The application does not directly operate the port, and the operation on the port is done by the interrupt service program. If the design of a hardware interface changes, you only need to modify its associated interrupt service program. Therefore, the interrupt processing mode makes the relevant hardware module local modification indicators higher. Life Time

The "Program Control Method" (CPU Query method) can meet the application demand in the early computer system, but with the increase of external equipments and the speed difference, this approach becomes the obstacle of the system performance improvement gradually. Its lifetime is limited to the early stage of the computer, because at that time the external devices are small, and are low-speed devices, to the 8-bit machine after the appearance of this peripheral control mode (architecture) is eliminated.