Driver-related Kernel code analysis

Arch\arm\include\asm\io.h

#define __raw_readl (a ) (__chk_io_ptr (a), * (volatile unsigned int __force *) (a))

#define __raw_writel (v,a) (__chk_io_ptr (a), * (volatile unsigned int __force *) (a) = (v))

Note: The(volatile unsigned int __force *) pointer is cast to the unsigned int type.

Where the volatile keyword has the following uses:

(1) to synchronize, because the same thing may have multiple copies of different storage media, some will make the values in these replicas different, which is not allowed, so simply use the volatile, let it only There is one, there is no other copy, so there is no problem of unsynchronized.

As shown below:

Volatile means telling the compiler not to use optimizations for this variable when programming the source code.
In general program design, such as:
int *a; int b;
b = (*a) * (*a);
Usually the compiler optimizes the code to reduce the read and write time of the memory:
int *a; int b; int C;
c = *a;
b = c * C;
If you change int *a to volatile int* a compiler will not automatically optimize it. During the whole operation, the value of the variable *a is read again. Prevents the value of the dependent variable *a from changing during this period, causing the program to result in an error.

(2) Prevent compiler optimizations remove certain statements, like I saw a register in arm very strange, when the interruption, the relative position 1, and Qing 0 can not write to this 0, to this write 1 is 1 is a clear interruption (Qing 0),

Suppose 0x560012300 is a register address
#define Intpand * (volatile unsigned int *) 0x560012300

Intpand = Intpand; Clear Interrupt

like the compiler if you see Intpand = Intpand; This seemingly useless operation, if there is no The volatile description, the compiler is likely to be removed intpand = Intpand; actually useful East West, but by the compiler when useless things optimized out.

(3) When the address is an IO port, the read-write address cannot be cached, which is relative This is available in some embedded caches. For example, when writing this IO port, if there is no such volatile, it is possible because of compiler optimization, will first write the value to a buffer, to a certain time to write to the IO port, so that the data can not be written to the IO port in a timely manner, With the volatile description, It will not go through the cache,write buffer this, but directly write to the IO port, thus avoiding the read-write IO port delay.

In the Include\linux\compiler.h:

#ifdef __CHECKER__
......
extern void __chk_io_ptr (void __iomem *);
#else
......
# define __CHK_IO_PTR (x) (void) 0
......
#endif

__raw_readl (a) expansion is:((void) 0, * (volatile unsigned int _force *) (a)). When the __checker__ is defined, call __chk_io_ptr to check the address, otherwise __chk_io_ptr do nothing, * (volatile unsigned int _force *) (a) is the value returned at the address of a. The practice of (void) xx is sometimes useful, for example, when the compiler opens a check for unused parameters, it needs to be used so that it can be compiled.

Note: statement expression x= (y= (a+b), z=10); Execution: Executes the statements in parentheses sequentially, noting that each statement is delimited by commas and assigns the value of the last statement Z to x.

The physical address of the CPU to I/O is programmed in two ways: one is I/O mapping and one is memory mapping. __raw_readl and __raw_writel are the original methods of operation I/O, which derive from the following methods: INB, Outb, _memcpy_fromio, readb, Writeb, Ioread8, Iowrite8, etc.

S3C2410GPIO the macro definition of the port arch/arm/mach-s3c2410/include/mach/regs-gpio.h

1.S3C2410_GPB5 is the port number, defined in Regs-gpio.h,

#define S3C2410_GPIO_BANKB (32*1)
#define S3c2410_gpiono (Bank,offset) (bank) + (offset)
#define S3C2410_GPB5 S3c2410_gpiono (s3c2410_gpio_bankb, 5)

s3c2410 a total of 130 gpio, divided into 9 groups (GPA~GPJ), each group can have up to 32, each gpio has an optional function, each set of control register space 4, for example, GPB, there are Gpbcon, Gpbdat, Gpbup and reserved , which are feature configuration, data caching, pull-up enable, and retention, respectively.

The above s3c2410_gpb5 is the Gpio number, that is, the position in the number space (0~32*9-1), the bank is the base number of the group, offset is the intra-group offsets . (That is, the number of all IO ports starting from 0 unified numbering such as: s3c2410_gpa0=0,s3c2410_gpa1=1,s3c2410_gpb0=32,s3c2410_gpc0=48, etc.)

2.S3C2410_GPB5_OUTP is a port function, defined in Regs-gpio.h,

#define S3C2410_GPB5_INP (0x00 << 10)
#define S3C2410_GPB5_OUTP (0x01 << 10)

Gpbcon 10th, 112 bits for configuring the GPB5 function, xx = Input, # = Output

3.s3c2410 Gpio operation function

In the hardware.h file, there are:

S3c2410_gpio_cfgpin//Configuring the GPIO capabilities of the port
S3C2410_GPIO_GETCFG//Read function configuration
S3c2410_gpio_pullup//configuration pull-up resistor
S3C2410_MODIFY_MISCCR//Miscellaneous configuration

S3C2410_GPIO_GETIRQ//Given port, the IRQ number is converted
S3c2410_gpio_irqfilter//Configure IRQ filtering to enable or not

S3c2410_gpio_setpin//write data to Port
S3c2410_gpio_getpin//Read data from Port

The implementation of these functions is in gpio.h

void S3c2410_gpio_setpin (unsigned int pin, unsigned int to)
{
void __iomem *base = S3c2410_gpio_base (PIN);//Calculate Port group virtual base address such as://gpa=0xf0e00000

gpb=0xf0e00010

unsigned long offs = S3c2410_gpio_offset (PIN); //Calculates the offset of the group in which the port is located (0~31)
unsigned long flags;
unsigned long dat;

Local_irq_save (flags);

DAT = __RAW_READL (base + 0x04); //virtual base address plus 0x04 for Gp*dat Register, plus 0x00 for gp*on, etc.

//read out the value of the current Gp*dat register
DAT &= ~ (1 << offs); ////The selected bits in the register are zeroed according to the offs offset, and the other bits remain unchanged
DAT |= to << offs; //bitwise operation according to the parameter to the required bit, to achieve the configuration of a specific IO port
__raw_writel (DAT, base + 0x04); //write the configuration to the register (here is the virtual address)

Local_irq_restore (flags);
}

4.s3c2410_gpio_base and S3c2410_gpio_offset are also defined in the Regs-gpio.h file,

#define S3C2410_GPIO_BASE (PIN) (((PIN) & ~31) >> 1) + S3c24xx_va_gpio)
#define S3C2410_GPIO_OFFSET (PIN) (PIN) & 31)

And in the Map.h, there are:

/* GPIO Ports */
#define S3C24XX_VA_GPIO s3c2410_addr (0x00e00000)//virtual address s3c24xx_va_gpio= 0xf0e00000
#define S3C2400_PA_GPIO (0x15600000)
#define S3C2410_PA_GPIO (0x56000000)//gpacon Physical Address
#define S3C24XX_SZ_GPIO sz_1m//0x100000 = 1024 *1024

The s3c2410_gpio_base function is to calculate the virtual base address of the group in which the port is located, based on the port number pin. (PIN) & ~31) is a fraction of the pin less than or equal to 31 (0 low 5 bits), >>1 because each set of Gpio can have up to 32 ports, control these ports require 4 register space, 4 register space needs 4*4=16 bytes to address , 32/16=2, left one just satisfied. That is, the number of the previous set of ports and the next set of ports differs by 32, while the address of the control register differs by 16.

The s3c2410_gpio_offset function is to calculate the offset of the group in which the port is located, based on the port number pin.  (PIN) & 31) that is, remove the number larger than 31 (0 6 digits above).

Driver-related Kernel code analysis