DxR route lookup algorithm-forward and dxr-forward
What kind of computing in a general computer that now carries a modern operating system looks and must be super fast? No doubt, the answer is memory access.
What kind of computing in a general computer that now carries a modern operating system looks very slow theoretically? There is no doubt that the answer is routing addressing.
It's really boring to have a holiday in advance!
Why do you think memory addressing is faster? Why do you think it must be faster? Because the operating system is based on virtual memory address addressing, there must be a ing between the virtual address and the physical address. This process actually slows down the memory access speed, but we have the CPU gift, address cache, that is, TLB!
As said, the core of modern programming technology is addressing technology. This is indeed the case. The processing performance of the CPU core has long been no longer a bottleneck, because the CPU always needs to communicate with peripherals, various bus laying and the core are out of the way, which has a great electromagnetic impact, the efficiency actually slows down the overall processing progress. The Cache at all levels of the CPU is used to avoid remote addressing, including L1/L2/L3 Cache and TLB. The TLB caches the address conversion result, it is the last effort to improve efficiency after the data/Instruction Cache L1/L2/L3 does not hit. If TLB does not hit the cache, it needs to execute the slowest process: Execute page table search, ing to physical addresses; address bus transmitting physical addresses; Data Bus retrieving data...
Let's broaden our horizons. Today, the entire IP network is a huge computer, and the IP address is the memory address that you can think of as. Try to compare the memory address and IPv4 address of the 32-bit system, you may think of something. In today's Internet, CDN is already playing the role of CPU Lx Cache, avoiding remote addressing as much as possible, but the performance optimization of IP routing is rarely unified. There is no unified solution here because in the network field, the opposite is true to the computer field, and the transmission capability is constantly enhanced, and its development speed is far higher than that of CPU, network transmission technology, such as the explosion of the general, the current 10 Gbit Ethernet no pressure, these cables can be buried in the soil, curved and curved walking on the crossbar, compared with the multi-layer interchange circuit boards that are neatly arranged on top of each other and have less than 10 Gbit/s of board bus performance, the hero does not ask the source. At this point, if you use the CPU for pure software route search, it will slow down the line speed of the midbox, the CPU such things on the same board to the high speed network has become a bottleneck.
The network technology has developed much faster than the CPU capability during the past decade without bypassing CPU Hardware forwarding. This is mainly due to the Integration Technology and bus technology of On-Chip Cache, concurrent technology and lock technology, unlike the 10-Gigabit/10-Gigabit Ethernet technology, can be considered as an independent technology. Common computers need to consider the cooperation of various resources, CPU technology, memory bus, electromagnetic Compatibility... therefore, the major router is basically done without the CPU, but directly as a forwarding chip. One card is inserted on a general computer and becomes a professional router. The data path is completely completed on the card and completely bypasses the CPU, which is like a small computer built in the computer. General computers only provide management and control functions, such as Cisco Express Forwarding.
The integration of on-chip and on-board bus technologies improves the integration capability, the efficiency is greatly improved, and the access memory efficiency is also improved. At this point, the CPU is now ready to unify all kinds of route forwarding hardware cards. Of course, it doesn't mean that all hardware forwarding technologies will be replaced by the CPU forwarding technology. If you want to pursue a higher speed, of course, professional hardware forwarding will win over CPU forwarding, but at least, high-speed CPU forwarding technology can eliminate and integrate most of the hardware forwarding technologies on the market.
Similar to the virtual address ing technology-ancient algorithms that are proficient in Linux network technology should all know that the existing two routing search algorithms are HASH search and TRIE tree algorithm, these two algorithms both include complex and fragmented data structures. They are well designed for pure software-based ideas. You should also be familiar with the BSD Protocol Stack, the Radix Tree Algorithm of BSD also performs well in software route search. But think about it, these algorithms are almost all born from the decades of vigorous development of the hardware routing and forwarding technology, so they are more like the spontaneous growth of the hidden power in their own place, it is not the result of the general trend. These algorithms are essentially a type of common routing search algorithms. They are not targeted at using the hardware structure of the hardware, such as the CPU Cache. They do not know on which platform they are running, these are all blocked by the OS interface, and all architecture-oriented optimizations exist in the form of pre-compiled macros or patches.
Similar to the virtual address ing technology-the DxR algorithm regards the target IPv4 address as the virtual memory address of an address space, and regards the next hop to the target address as the physical page address corresponding to the virtual memory address, can a route table be constructed just like a page table? Think about how frequently a virtual address is translated to a physical page and how efficient it is! Unfortunately, the CPU does not have an MMU mechanism for processing IPv4 addresses. Of course, as a general-purpose CPU, it should not have such a mechanism. However, you can always figure out something by analogy.
The efficiency of route table search is not based on the time complexity of the algorithm itself (I believe few people use the Traversal method. All the algorithms that can be selected as system search algorithms are acceptable ), the overhead lies in the implementation. If the CPU Cache can be used, the algorithms with the same time complexity and those without the Cache will surpass the efficiency by an order of magnitude. If you want to use the CPU Cache, you have strict requirements on the data structure and must be compact and cannot occupy too much space, it is a good idea to organize a route table into a page Directory/page table class structure, which is compact enough and can be loaded into the Cache. In addition, the IPv4 address and the virtual memory address are similar, but the contents of the corresponding page of the route table are not indexed by fixed IPv4 address bits, but are obtained by K> = 16, where is the index? The index is not a page table, but a range Table. Although this table can be indexed by 32-K, many routing items are aggregated. Therefore, it can be a binary tree, still a compact array in the Organization. This is the core of the DxR algorithm. It can be seen that there is nothing new, but the data structure of the existing algorithms is re-organized. For the core idea, see the MMU Implementation of CPU.
