FPGA debugging Summary

Source: Internet
Author: User

Recently, some FPGA boards (ep4ce30f23c8n) were maintained, and we found that there were a pair of ground-to-ground short circuits for both 3.3v and 1.2v FPGA boards. After removing some chips powered by 3.3v, they were still short-circuited, there is no way to simply remove the FPGA chip. As a result, the short-circuit phenomenon disappears. It turns out that the FPGA 3.3v and 1.2v are short-circuited;

Further find out the cause, determine which bank of FPGA has a short circuit, and continuously measure several FPGA chips, and find that they are all bank5 problems;

Continue to investigate, why is there a problem with bank5? There is a definite internal cause, and it is assumed that some signals from the bank are abnormal, causing the bank to be broken down;

In order to confirm this assumption, the measurement of the relative signal impedance of bank5 actually verifies the previous assumption, the impedance of the two signal lines connected to I2C is abnormal to varying degrees (normal boards are infinite, and the I2C signal lines connected to FPGA are onlyFrom a few euros to several hundred eurosIt seems that the I2C signal has an impact on the FPGA pin, causing the FPGA power supply to be broken into a short circuit (FPGA is still quite fragile, be careful, huh, huh ).

 

In view of this maintenance work, the FPGA system debugging and maintenance are also summarized.

FPGA system is abnormal. There are two common causes:

1, FPGAThe power-on configuration is unsuccessful;

2, FPGAAlthough the power-on configuration is successful, it does not work properly.

In either case, you should first checkPower Supply System and Crystal OscillatorCheck if they are working properly. check whether they are correct before proceeding to the troubleshooting process.

In the first case, the configuration circuit can usually be located in FPGA: 1. ConfirmConfiguration ModeWhether the selection is correct; 2. Configure the signal lineImpedanceIs it normal? These signal lines have:Config_done, Nconfig, nce, nstatus, NCs, asdo, DCLK, and data. It is easier to determine the local impedance of the config_done signal ). Under normal circumstances, the config_done must be at leastSeveral thousand eurosLevel (the impedance here is about11 KEuro), if the measurement impedance is less than 1 K, then it is sure that the configuration circuit has a problem.

In the second case, the crystal oscillator is usually used to remove power issues. If the above measures do not effectively locate and solve the problem, you can further confirm the hardware connection and software settings of the FPGA global signal line, such:Dev_oe,Dev_clrn.

 

I hope that the above personal debugging summary will be helpful to FPGA beginners in hardware design and debugging. You are also welcome to discuss and exchange.

 

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