FPGA implementation of Cordic algorithm

Source: Internet
Author: User
Tags sin cos

Cordic Algorithm Reference: http://wenku.baidu.com/view/6c623aa8910ef12d2bf9e732.html

This is a document of Baidu Library, the basic content of Cordic algorithm is introduced in detail. I just read this document and do the CORDIC algorithm to perform the operation of the sin Cos.

First of all, to understand: To do this iterative type of algorithm, I think with a For statement implementation is the most understandable, so my design is based on the structure of the implementation of the algorithm, the important number of bits to determine, the top of the document is also described, my choice is Z 17-bit, 1-bit sign, 8-bit integer, 8 decimal Y Select 21 bits, 20 decimal places, one sign bit. All the numbers are according to this standard.

Paste code (post-paste format changed, did not indent, make a look)

Module Test_cordic (clk,rst_n,z0,en,sin_out,cos_out),//z0 is the input angle value, en is the operation enable, Sin_out,cos_out is the operation output.

Input clk,rst_n;
input [16:0] z0;
input en;
Output [10:0] sin_out,cos_out;
Reg En_buff;
[email protected] (Posedge CLK or Negedge rst_n)
Begin
if (!rst_n)
En_buff<=0;
else
en_buff<=en;
End
Reg [16:0] angel[0:9];
[Email protected] (Posedge CLK or Negedge rst_n)
Begin
if (!rst_n)
begin
Angel[0]<=17 ' b00010110100000000;//45
angel[1]<=17 ' b00001101010011001;//26.6
angel[2]<=17 ' B00000111000000000;//14
angel[3]<=17 ' b00000011100011001;// 7.1
angel[4]<=17 ' b00000001110011001;//3.6
angel[5]<=17 ' b00000000111001100;//1.8
angel[6]<=17 ' b00000000011100110;//0.9
angel[7]<=17 ' b00000000001100110;//0.4
angel[8]<=17 ' b00000000000110011;// 0.2
angel[9]<=17 ' b00000000000011001;//0.1
End
End

Reg [16:0]reg_z[0:9];//1 Fuhao wei 8 zhengshu 8xiaoshu
Reg [10:0] reg_x[0:9];
reg [10:0] reg_y[0:9];
Reg [4:0] I;
[email protected] (Posedge CLK or Negedge rst_n)
Begin
if (!rst_n)
Begin
for (i=0;i<=9;i=i+1 ' B1)
begin
Reg_x[i]<=0;
reg_y[i]<=0;
reg_z[i]<=0;
End
End
Else if (en&&!en_buff)
begin
Reg_x[0]<=11 ' b01001101101;//0.6073<<10 + 1wei Fuhao Wei
reg_y[0]<=0;
reg_z[0]<=z0;
End
Else
begin
for (i=1;i<=9;i=i+1 ' B1)
begin
if (reg_z[i-1][16])
Begin
Reg_x[i]<= reg_x[i-1]+ (reg_y[i-1]>>i-1);
reg_y[i]<=reg_y[i-1]-(reg_x[i-1]>>i-1);
reg_z[i]<=reg_z[i-1]+angel[i-1];
End
Else
begin
Reg_x[i]<=reg_x[i-1]-(reg_y[i-1]>>i-1);
reg_y[i]<=reg_y[i-1]+ (reg_x[i-1]>>i-1);
reg_z[i]<=reg_z[i-1]-angel[i-1];
End
End
End
End
Assign sin_out=reg_y[9];
Assign cos_out=reg_x[9];
Endmodule

The test code is simple, does not post, paste a 30 degree evaluation result

The result is sin30=00111111111; what do you mean? The highest bit sign is 0, which represents a positive number, and the latter 10 is the fractional part that is 0.0111111111, the 10 is 0.499, and the same cos30=01101110110 to 10 is 0.8652. Of course you can try other angles.

FPGA implementation of Cordic algorithm

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