FPGA zero-pass Detection Algorithm

The zero crossing detection method is the function of the comparator. It can convert a sine wave of a certain frequency into a square wave or a pulse wave. This is necessary in the test frequency and other places, because FPGA only recognizes the edge, but does not recognize the sine wave.

The algorithm is divided into two parts: the determination of the zero point and the generation of the pulse wave.

Why do we need to determine the zero point. We know that the general ad is like 0 ~ Convert 5 V to 0 ~ 255 or something like that, or-2 ~ 2 V input, there will be an internal conversion circuit. Therefore, the normal zero point is not 0, but more likely 125 or 126. However, to be more accurate, the real zero point should be (MAX + min)/2. It is common to collect the maximum and minimum values, that is, to continuously update a register and assign the value to Max or min after a period of time.

For example:

If (AFT> maxtmp) Then maxtmp <= aft; endif;

If (AFT <mintmp) Then mintmp <= aft; endif;

The pulse wave produces two data points before and after comparison. if the first one is less than zero and the last one is greater than zero, an over zero pulse is generated.

Here is a trick. We used to detect the first and second values by using the concatenation operator. However, ad outputs are usually multi-bit and it is inconvenient to use the concatenation operator. Therefore, we can use the features of non-blocking assignment:

Aft <= sin_in;

Prev <= aft;

In this way, AfT is the next value, and Prev is the previous value. In fact, this method should be a general method. The following is simple:

If (prev <= zero) and (AFT> = zero) then

Pulse <= '1 ';

Else pulse <= '0 ';

Endif;

FPGA zero-pass Detection Algorithm