With further research, we will gradually come into contact with your computer configuration patterns, and design principles. In these, solving a computer is a very important concept that we need to understand very well.
I. Preliminary heats:
(1) Count
Before contacting the addressing method, we also need to understand the concept of the operand, depending on how the operand is stored, we can divide the operand into 3 classes,
1. Immediate operation number: The operand is included in this instruction.
2. Register operand: The operand is stored in a register of the CPU.
3. Memory (memory) operand: the operand is stored in the memory;
(2) Logical address
Logical address = Segment Address (the logical segment address where the storage unit resides) move Left 4-bit + offset address (the offset address of the cell)
We can find out. This is done by moving the 16-bit to 20-bit in the left-hand way, initially as if the compatibility issue were to be handled conveniently. In this way.
Segments are the result of the memory design model, where the address space of each processor is inconsistent (due to compatibility) in the 80x86 memory model, but they are cut into areas of 64KB, each of which is called a segment.
Note: Different segment addresses and offset addresses may consist of the same memory address as: (Segment Address (after 4 for left): A0000, offset address ffff. finally address affff; segment address (after moving left 4 digits): AFFF0, offset address 000F, finally address affff).
Two. Classification of addressing methods:
The same as the operand type. Also leads to differences in addressing mode types. The addressing method can be divided into three main categories:
(1) Immediate addressing: the operand is immediately the number of operations; MOV AL. 1234H
(2) Register addressing: operand is register operand; MOV Ds,ax
(3) The address of the memory operand can be divided into 5 kinds:
1. Direct addressing: The offset address is stored directly in the memory; MOV bx,ds:[1234h]
2. Register indirection: Put the operand in the memory of the address in the register, first remove the address of the operand from the register, and then remove the operand from the corresponding memory unit of the memory; MOV AL,[BX]
The General register defaults to DS (data segment). The default for the BP register is SS (stack segment);
3. Address: The offset address of the storage unit is the specified base register (BX, BP) content with a constant to drink, MOV dl,ds:[bx+2]
4. Address addressing: MOV dl,[di+2]
5. Base Address + variable address addressing
It's lighter than that. The content of the subject is roughly the same. Some places are just passing, no special instructions, interested classmates can do it by themselves. Check the information on the Internet, see.
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Intel 80x86 Addressing mode