Intel CPU Overview-from 8086 to four-generation Core i7

Intel is now synonymous with CPUs, but it's not as beautiful as it is now. For 35 years, the 8,086-2013-year-old four-generation i7, released in 1978, has witnessed several changes from PCs to the Internet and mobile Internet, which have changed so much over the years. This article does not intend to describe and comment on this history and the man who led the history (which is enough to write several books), if you are more interested in the content, please go. This article makes a brief introduction to several prominent figures in the Intel CPU family and compares them to the difference.

Brief History

Next, make a brief introduction to some of Intel's landmark CPU products.

intel®8086 (16-bit, 1978)

This is a 1978 release of the CPU products, is the Intel family elders. The 1970s thing, why do you want to introduce it? Because I like many schoolmates, the university also must learn this kind of old thing. When I was in this class, I was wondering why I had to learn something so old. Later, the other Intel's CPU to know that the more powerful the next CPU, of course, the more complex, a semester also learn not to finish; Of course, these are something.

Before 8086, there is a small well-known 8-bit CPU products--8088, but it is far from the impact of the product is not 8086, so this article will not introduce him.

To look at the 8086 "new features" bar:

Take a look at a few "worth mentioning":

Direct memory addressing capability up to 1MB clock frequency 5 m, 8M, 10MHz the last one says: There are 40 pins, ceramic and plastic, two kinds of encapsulation

The last sentence of the last paragraph is noteworthy: 8086 can achieve high performance through multiple processors.

The IA-32 series architecture developed from 8086 such 16-bit processors. 8086 has a 16-bit register, a 16-bit external data bus, and a 20-bit database bus that provides 1M-byte addressing capabilities, 1m=2^20.

8086 the concept of "Duan" is introduced into the IA-32 architecture. Because of the introduction of the segment, a 16-bit segment register holds a pointer to 64K bytes of memory. A 20-bit address can provide a 1M byte of addressing capability via a segment register and an additional 16-bit pointer.

intel®286 Processor (1982)

The Intel286 processor introduced "protection mode" to IA-32. Protected mode uses the contents of the segment register as a selector or pointer pointer to a descriptor (descriptor) table. Descriptor provides a 24-bit base address, which increases physical memory addressing to 16M bytes (16m=2^24) and supports virtual memory management based on segment switching, as well as some of the column protection mechanisms. These mechanisms include:

Segment bounds check read-only and execute segment options four privilege levels

The clock frequency is from 6MHz to 20MHz.

The intel386™processor (1985)

The Intel386 processor is the first 32-bit processor in the IA-32 architecture family. It includes a 32-bit register that can hold operands and can be used for addressing. The lower half of each 32-bit register retains the functionality of the previous series of 16-bit registers, allowing for back-compatibility (compatible with past executable code). The processor also provides virtual 8086 mode to allow effective execution of programs created for 8086/8088.

In addition, the INTEL386 processor also supports:

32-bit address bus, the highest support for 4G physical memory segmented (segmented) memory mode and flat (flat) memory mode paging, the size of a fixed 4k page provides a "virtual memory management" method support parallel Stages (should be referred to as the execution of several stages of instruction can be parallel)

Clock frequency is 12.5MHz

intel®486™ Processor (1989)

The Intel486 processor improves the execution of instructions by extending the instruction decoder (instruction decode) and the Execution unit (execution uint) of the 386 processor to 5 queuing stages (pipelined stage). The operation of each phase is performed concurrently with the different stages of the other instructions.

In addition, the processor also introduces:

8k upper-level cache, which increases the number of instruction executions per unit of time. Integrated x87 floating-point Computing Unit (FPU) power-saving mode and system management capabilities

Clock frequency from 25M to 50M.

intel®pentium® Processor (1993)

Intel Pentium processors have joined the second execution pipeline (pipeline) to achieve stronger performance (two pipelines, well known U and V pipelines, which can execute two instructions in the same clock cycle). On-chip cache doubling (16K), 8k for caching code, 8k for caching data. The data cache uses the MESI protocol with the INTEL486 processor to support more efficient cache writeback. An on-chip branch table and is added to enhance the execution performance of the loop.

In addition, the processor has joined:

Some extensions make the virtual 8086 mode more efficient, and allow the internal data paths of 4M or 4 K-byte paging 128-bit and 256-bit to be used to prompt internal data-transfer-enhanced external bus to increase to 64-bit APIC (Advanced programmable Interrupt Controller, Advanced Programmable interrupt controller to support dual-core systems with no glue (external controller coordination) for use in multi-core dual-core mode

Another important milestone is the introduction of Intel MMX technology by the Pentium family, which uses the single instruction multiple data (single-instruction multiple-data, SIMD) execution mode to implement parallel computations on the 64 register.

Clock frequency from the initial 60Mhz and 66Mhz to later 200MHz

intel®pentium®4 Processor Family (2000-2006)

PS: These six years for the world of CPU, the transformation is too fast, "rapid change" seems to be not enough to describe the changes in the CPU over the years.

The Intel Pentium 4 processor family is based on the Intel NetBurst microarchitecture. The Pentium 4 processor introduced SSME2 (streaming SIMD Extension 2).

The Pentium 4 processor has a 3.4GHz frequency and supports Hyper-Threading technology (Hyper-threading Technology).

The Intel 64 architecture is introduced in the Pentium 4 processor 6xx and 5XX series.

Intel®virtualization Technology (INTEL®VT) is introduced in Pentium 4 processors 672 and 662.

Ben 4 series has come close to the limit of CPU frequency technology, which makes the "Moore's Law" of the year no longer useful.

Here, I'll just give you some brief description. intel®xeon®processor (2001-2007) Intel Xeon Series, the family was originally IA32 architecture, later products used more Intel64, the family is designed for multi-core high-performance servers and workstations.
The Intel®core™duo and Intel®core™solo processors (2006-2007) series is Intel's design for Low-power CPU products, It was mainly used for laptops at that time (the notebook market was growing quickly, replacing PCs).
The new series of Intel®xeon®processor 5200, 5400, 7400 Series and Intel®core™2 Processor Family (2007) Xeon are still "tall" service-side routes, A new architecture based on 45nm.
intel®atom™processor Family (2008) Atom Architecture, 45nm technology, is also designed for low power consumption, most for mobile devices (cell phones, tablets, etc.). It was the timing of the smartphone's rise, though the market's eldest was Nokia (S60 already known as a smartphone).
intel®core™i7 Processor Family (2008)

Nehalem architecture, 45nm. And Atom at the same time the product of the core I series, which is also counted as a "household name" products.

intel®xeon®processor 7500 Series ()

Nehalem architecture, 45nm. Continue to be tall.

Second Generation intel®core™processor Family ()

Sandy Bridge Architecture, 32nm. The second generation of core I series, I now use the i2410 is this series.

Third Generation intel®core™processor Family ()

Ivy Bridge architecture, and some Ivy BRIDGE-EP architectures.

Fourth Generation Intel®core™processor Family (2013)

Haswell architecture.

"three representatives"

Here you need to point out three machines that represent the CPU, they are 8086,386 (IA32) and Core i7 (INTEL64).

8086CPU Architecture

8086 relative to the later CPU is much simpler, which is why textbooks like to take him to say the reason. Let me get a glimpse of the 8086 architecture (left). Closely related to the architecture is its pin encapsulation, yes, he's the same as the 40-pin package of the 51 microcontroller (right).

Basic Execution Environment

For me and other program apes, architecture and encapsulation are not our concern; we only care about our code. Until now, the code related to the specific CPU still needs to be written in assembly language; it is the register that is naturally concerned; on the top 8086

The schema diagram (left) can be seen in the segment registers (Segment register) and instruction pointers (instruction pointer).

8086 register is very few, less than a picture can generalize all registers:

Where IP is the instruction pointer, flags for machine status word. The Cs,ds,ss,es is a four-segment register, SP and BP are data pointers, and Si and Di are index registers (the index register).

The IA32 registers are more:

Because, in addition to the basic execution, it also has the FPU (floating-point computing unit), MMX (multimedia Enhancement) and XMM (SSE related).

IA32 instruction pointer and machine status words are called EIP and EFlags respectively.

which

8 32 for registers: EAX, EBX, ECX, EDX, ESI, EDI, EBP, ESP

6 segment registers are: CS, DS, SS, ES, FS, GS

The Intel 64 execution environment is similar to the IA32 environment:

The General register for Intel 64 increased to 16, respectively: RAX, RBX, RCX, RDX, RSI, RDI, RSP, RBP, R8~r15

compatibility

IA32 can be compatible with 8086, and 8086 of programs can run on IA32, depending on the compatibility of registers and instructions. This won a good market for intel at that time, just imagine, if 386 is not compatible with DOS, it is estimated that there will be no Microsoft today.

Similarly, Intel 64 is also compatible with IA32, and here is a comparison table:

Memory Model

Next, briefly describes the 8086,IA-32 and Intel 64 memory models.

8086 of the 20-bit address bus, but the register is 16 bits, which seems bound to lead to the segmented memory model. The Code Snippet Register (CS) and instruction Pointer (IP) point to the currently executing code, and the data segment Register (DS) or other segment registers are combined with the index registers to locate the data in memory.

IA32 Memory Model

IA32 era, virtual memory technology has been supported by the CPU, this is the emergence of three memory models:

flat memory model , memory performance is a single contiguous address space, this address space is also called the linear address space.

segmented memory model , memory is represented as a series of independent address space, the code segment, data segment, stack (stack) segment is a typical independent segment. The program addresses a byte using a logical address. All segments of the system are mapped to the processor's linear address space, and the processor is responsible for the conversion of the logical address and the linear address. This conversion is transparent to the application.

Real Address mode , this address mode is used for Intel 8086 processors. It is designed to allow the program to run on a 8086 processor.

A schematic diagram of several patterns is shown below:

pagination vs. virtual memory

In the flat and segmented memory model, the linear address space is mapped directly (or paginated) to the physical address space of the processor.

When using direct mapping (close pagination), each advance address has a one-to-one physical address corresponding to it. The linear address is sent directly from the processor's address bus without any conversion.

When using the paging mechanism of the IA-32 schema (opening paging), the linear address space is divided into a series of pages and mapped to virtual addresses, and subsequent pages of virtual memory map the corresponding physical memory as needed. When the operating system or executable program uses a page, the paging mechanism is transparent to the application. All applications look at the linear address space.

In addition, the IA-32 paging mechanism includes some extension features:

The Physical Address Extension (pae,physical address Extensions) is used for addressing a page size extension (pse,page size Extensions) that exceeds 4G to map a 4M byte linear address page to a physical address.

extended Reading This article is just an overview (or introduction) of Intel's series of CPUs, and more details please read Intel's developer Manual "3".

"1" CPU development process: Intel (Intel Corporation), http://web.gxmu.edu.cn/zz/Article/ShowArticle.asp?ArticleID=76

"2" Intel 8086 6-bit HMOS microprocessor 8086/8086-2/8086-1,http://download.csdn.net/detail/xusiwei1236/8373939

"3" intel®64 and IA-32 architectures Software Developer ' s manual,http://www.intel.com/content/www/us/en/processors/ Architectures-software-developer-manuals.html