Key direction control of running water lamp

Module Liushuideng
(
Clk,rst_n,led_0,sw1_n,sw2_n,sw3_n
);
Input clk;//clock Signal, 50MHZ
Input rst_n;//reset signal, low active
Input sw1_n,sw2_n,sw3_n;//three independent keys, low means press
OUTPUT[3:0] led_0;//Running lights, 0--out, the eternal
//--------------------------------------------------------
Reg Led_dir;//0--right,1--left
Reg Led_on;//0--off,1--on

REG[23:0] CNT;

Always @ (Posedge CLK or Negedge rst_n)//Count
if (!rst_n)
CNT <=24 ' D0;
Else
CNT <= cnt+1 ' B1;

REG[3:0] Led_move;

Always @ (Posedge CLK or Negedge rst_n)//Running Lights
if (!rst_n)
Led_move <= 4 ' B1;
else if (cnt = = Hffffff && led_on)
Begin
if (Led_dir)
Led_move <= {Led_move[2:0],led_move[3]};//left
Else
Led_move <= {led_move[0],led_move[3:1]};//right
End

//---------------------------------------------------------

reg [2:0] Key_rst;

Always @ (Posedge CLK or Negedge rst_n)
if (!rst_n)
Key_rst <= 3 ' b111;
Else
Key_rst <= {sw3_n,sw2_n,sw1_n};//Each clock cycle assigns key values to the Key_rst

REG[2:0] key_rst_r;//The LOW_SW signal is latched to the low_sw_r on the rising edge of each clock cycle

Always @ (Posedge CLK or Negedge rst_n)
if (!rst_n)
Key_rst_r <= 3 ' b111;
Else
Key_rst_r <= key_rst;//Second-level register to key_rst_r the previously latched key value

WIRE[2:0] Key_an = key_rst_r & (~key_rst);//When register Key_rst is changed from 1 to 0 o'clock, the value of Led_an becomes high, maintaining a clock cycle

//------------------------------------------------------

REG[23:0] cnt_cn;//Count Register

Always @ (Posedge CLK or Negedge rst_n)
if (!rst_n)
CNT_CN <= ' d0;//asynchronous reset
else if (Key_an)
CNT_CN <=24 ' D0;
Else
CNT_CN <= CNT_CN + 1 ' B1;

REG[2:0] LOW_SW;

Always @ (Posedge CLK or Negedge rst_n)
if (!rst_n)
LOW_SW <= 3 ' b111;
else if (cnt_cn = = hffffff)//full 20ms, key values are latched to register LOW_SW
LOW_SW <= {sw3_n,sw2_n,sw1_n};//executed once per 20ms

//------------------------------------------------------
REG[2:0] Low_sw_r;

Always @ (Posedge CLK or Negedge rst_n)
if (!rst_n)
Low_sw_r <= 3 ' b111;
Else
Low_sw_r <= low_sw;//per clock cycle

/*
LOW_SW 111 111 111 110 110 110
~LOW_SW 000 000 000 001 001 001
LOW_SW_R 111 111 111 110 110 110

Led_ctr1 000 000 000 001 000 000
*/

When the register LOW_SW is changed from 1 to 0 o'clock, the value of Led_ctrl becomes high, maintaining a clock cycle
WIRE[2:0] Led_ctrl = low_sw_r[2:0] & (~low_sw[2:0]);

Always @ (Posedge CLK or Negedge rst_n)
if (!rst_n)
Begin
led_on <= 1 ' b0;
Led_dir <= 1 ' b0;
End
Else
begin//when a key value changes, the LED will be illuminated, left, or right-shifted
if (led_ctrl[0]) led_on <= ~led_on;
if (led_ctrl[1]) led_dir <= 1 ' B1;
if (led_ctrl[2]) led_dir <= 1 ' b0;
End

Assign led_0 = led_dir;//led

Endmodule

Key direction control of running water lamp