The LDR pseudo-directive is in the form of "Ldr rn,=expr". Here is an example of how to use it.
COUNT EQU 0x40003100
......
LDR R1,=count
MOV R0, #0
STR R0,[R1]
Count is a variable that we define, with the address 0x40003100. This definition method in assembly language is very common, if you use a single-chip computer, should be familiar with this usage.
LDR R1,=count is the address of this variable of count, which is 0x40003100 put into R1.
MOV R0, #0是将立即数0放到R0中. The last sentence, str r0,[r1] is a typical storage instruction that places the values in the R0 into a storage unit with the address of the value in R1. The real thing is to put 0 into a storage unit with an address of 0x40003100. The three instructions are visible to complete the assignment of the variable count. With three instructions to complete the assignment of a variable, it looks a bit uncomfortable. This may be related to the use of RISC by arm.
Here's another example
; Assigns the value of Count to R0
LDR R1,=count
LDR R0,[R1]
LDR R1,=count This pseudo-directive, is how to complete the address of the count to R1, interested can see its compiled results. This instruction is actually compiled into an LDR directive and a DCD pseudo-directive.
Two usages of Ldr 1) Ldr pc, =MYHANDLEIRQ means to put the MYHANDLEIRQ symbol into the PC Register 2) Ldr PC,MYHANDLEIRQ means that the value in the address represented by the MYHANDLEIRQ symbol in memory will be read, and need to read the memory once more. In the code: start:
Ldr Pc,=myhandlereset @jump to Handlereset
Ldr Pc,=myhandleundef @jump to Handleundef
Ldr Pc,=myhandleswi @jump to Handleswi
Ldr Pc,=myhandleiabort @jump to Handleiabort
Ldr Pc,=myhandledabort @jump to Handledabort
Nop
Ldr Pc,=myhandleirq @jump to Handleirq <= line before the error
Ldr Pc,=myhandlefiq @jump to Handlefiq @MyHandleIRQ:. Word os_cpu_irq_isr
MYHANDLEIRQ:
Sub LR, LR, #4 @ To calculate the return address
Stmdb sp!, {R0-R12,LR}
Ldr LR, =int_return @ Restore the return address
LDR pc, =int_handle @ call for the interrupt handler in the "line before error", if you change to "Ldr Pc,myhandleirq", you cannot interrupt processing when the interrupt arrives. Another situation is correct, notice the experience: start:
Ldr Pc,=myhandlereset @jump to Handlereset
Ldr Pc,=myhandleundef @jump to Handleundef
Ldr Pc,=myhandleswi @jump to Handleswi
Ldr Pc,=myhandleiabort @jump to Handleiabort
Ldr Pc,=myhandledabort @jump to Handledabort
Nop
Ldr Pc,myhandleirq @jump to Handleirq <= line before the error
Ldr Pc,=myhandlefiq @jump to Handlefiq MYHANDLEIRQ:. Word os_cpu_irq_isr
@MyHandleIRQ:
@ Sub LR, LR, #4 @ To calculate the return address
@ Stmdb sp!, {R0-R12,LR}
@ ldr LR, =int_return @ Restore the return address
@ LDR pc, =int_handle @ call for the interrupt handler because when the interruption comes, you also need to go to the MYHANDLEIRQ to remove the OS_CPU_IRQ_ISR, that is, to take more memory. Turn from http://www.cnblogs.com/hnrainll/archive/2011/06/14/2080241.html to Http://blog.csdn.net/iamwenyifuxing/article /details/5578034
LDR Pseudo-directives and LDR loading instructions in arm