MIPS five-level integer pipelined simulation system

The program operation effect chart is as follows:

This article directory:

1. Introduction

2. Simple Requirements Analysis

3. Core function implementation

4. Interface and use

5. Test

1. Introduction:

1.1 Experimental Requirements:

1) Read in interactively or from a file (enter the filename suffix. mips) input a part of MIPS assembler, choose different execution mode, can give the program in the MIPS pipeline implementation of the pipeline state diagram, can display each register or a storage unit value (16 or 10), the number of execution of each instruction , frequency, and the total number of clock cycles used in the execution of the program.

2 The following MIPS integer instructions can be correctly executed: ' LW, SW, ADD, SUB, Mut, DIV, and, or, XOR, Addi, Subi, MUTI, DIVI, ANDI, ORI, Xori, Beqz, Bnez, J, jr,t Rap (indicates program end instruction).

3 Provide interface interaction settings or modify registers, storage unit values, to register, storage units and the implementation of statistical results of the 0 operation.

4 request to provide two kinds of simulation execution mode: There is advance circuit mode, no advance circuit mode;

5 implement four different transfer processing strategies: Pipeline removal, prediction success, unsuccessful prediction transfer, delay transfer. (Note that pipeline cleanup and prediction success is the same on the MIPS integer assembly line)

1.2 Overall Description:

The basic program is in the MIPS Simulator folder, the binary file is under bin. Where MIPS Simulator.exe is an executable file.

There are still many questions, please forgive me!

For more information please read the design documentation provided in this article and the full source code.

Download design documents and code: http://www.vckbase.com/code/downcode/?id=2466