MIPS instruction Set Correlation

Source: Internet
Author: User
Tags mips instruction set

Register:

Register number Symbol Name purpose
0 always 0 looks like a waste, actually very useful
1 at reserved for assembler use
2-3 v0,v1 function return value
4-7 a0-a3 several function parameters
8-15 t0-t7 Temporary Register, sub-process can be used without saving
24-25 T8,t9 Ibid.
16-23 S0-S7 Register variable, a sub-procedure must be saved before it can be used
Then recover before exiting to retain the value required by the caller
26,27 K0,K1 reserved for exception handling function use
GP global pointer; for easy access to global or static variables
SP stack pointer
S8/FP 9th register variable; a sub-procedure can be used to make a frame pointer
RA return address
There is no difference between these registers on the hardware (except for number No. 0), the purpose of the distinction is that the code generated by different compilers can be generalized

Special Registers

There are three special registers defined in the MIPS32 Architecture: PC (Program counter), HI (multiplication result high register), LO (multiplication result low register). When doing multiplication, hi and lo Save the result of multiplication, where hi stores high 32 bits, Lo storage is 32 bits low, and Hi and lo hold the result of division operation, where Hi stores the remainder, Lo storage quotient.

MIPS instruction Set Correlation

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