MoV MVN range Problems

It took a long time to read sections 5 and 6, but I did not know much about it. However, I still feel that I have learned a lot about it. Summary:

1. mov/MVN

Some 32-bit values in a specific range can be directly loaded into the register. These values include:

(1) 8-bit constant, that is, 0--255

(2) An eight-bit constant shifts an even number to the right.

(3) MVN can process (1) (2) bitwise inverse values of Values

If the number of immediate constants in the mov/MVN command is not in the preceding range, the assembler reports an error.

2. LDR Rd, = literal numerical constant

Any 32-bit value can be loaded into the register. The assembler first tries to use the mov/MVN command to process the given literal value constant. If it cannot be processed, it is then processed by the text pool, put constants in the text pool and obtain the required constants from the text pool.

3. the ADR command calculates the offset of the given PC-related expression against the PC, and then tries to generate an instruction for address loading. The address range that can be processed is 255 bytes (non-word-aligned address) or less than 1020 bytes (Word-aligned address, 255 words. If the offset of the given expression to the PC address is not in this range, the assembler reports an error.

4. the adrl command calculates the offset of the given PC-related expression against the PC, and then tries to generate two commands for address loading. The address range that can be processed is 64 KB (non-Word Alignment address, 255*255) or KB (64 K * 4. If the offset of the given expression to the PC address is not in this range, the assembler reports an error.

5. LDR Rd, = expression relative to PC

The command calculates the address represented by the expression, puts the address value in the text pool, and loads the address from the text pool. Note: The compiled code always loads the address from the text pool and does not use the offset relative to the PC to represent the address. This process takes a long time (you need to access the text pool), so you should try to use ADR or adrl. LDR is used only when ADR and adrl are not available.

6. About debugging

We found that the armsd-based debugging method is described in this document. This chapter only applies to programs with assembly code, which is probably a version issue of armsd. However, all the programs involved in this chapter can be debugged using the axd Debugger in analyticdb 1.2. It is also a graphical interface and easy to use. If you want to see the source code in the debugger, add the-G parameter to the ARMCC or armasm command line, which indicates debugging information is required.

 

5. Load constants to registers.

5.1 why is loading constants a problem?

Because all arm commands are 32-bit long and do not use the command stream as data, it is impossible for a single command not to load data from the memory, load any 32-bit immediate number constant into the register.

Although data loading can load any 32-bit value into registers, there are more direct and effective methods to load many common constants.

5.2 directly load with mov/MVN

The mov command can directly load 8-bit constants (0--255) into registers. MVN can load the bitwise inverse values (0xffffffff00 to 0 xffffffff) of these values into registers.

The mov and MVN can be combined with the bucket location to construct more constants. The constants that can be constructed are the result of an 8-bit value loop moving the even digits right. For example:

0--255 0 -- 0xff do not shift

256,260,264,..., 0x100 -- step 4 between 0x3fc and move 30 digits to the right of the loop

1056, 4080,... 0x400 -- Step 16 between 0xff0, and shift 28 places to the right

And the bitwise inverse values of these values. You can directly use commands to load these constants into registers:

MoV r0, # 0xff; R0 = 255

MoV r0, #0x1, 30; R0 = 1020

MoV r0, # 0xff, 28; R0 = 4080

However, it is not easy to convert constants into this form. The assembler tries to perform this conversion. If the conversion fails, the assembler reports an error.

The following example shows how the assembler performs this conversion. The left column is the arm command entered by the user, and the right column is the conversion attempted by the assembler.

MoV r0, #0 ========> mov r0, #0

MoV R1, #0xff000000 ======> mov R1, #0xff000000

MoV R2, #0 xffffffff ======> MVN R2, #0

MVN r0, #1 ========> MVN r0, #1

MoV R1, #0xfc000003 ======> mov R1, # 0xff, 6

MoV R2, # 0x03fffc ======> MVN R2, # 0xff, 6

 

5.3 use LDR Rd, = literal constant for direct loading

The assembler provides a method for constructing any 32-bit numeric constants, which is different from mov and MVN and does not require data processing. This is the LDR Rd, = command.

If the constants in the ldr Rd, = command can be constructed using mov or MVN, the assembler will use mov or MVN, otherwise, an LDR command with a relative PC address will be generated to read the required constants from the text pool. The text pool is a memory allocated for constants. Generally, there is a text pool behind each end pseudo command. However, in a large program, it may not be accessible (because the offset in the LDR command is a 12-bit value, it can only represent the range of 4 kb ). In this case, the ltorg pseudo command can be used.

When LDR Rd, = command is used to access constants in the text pool, the assembler first checks whether the current text pool can be accessed and whether there are required constants in the pool. If yes, the existing constants are edited; otherwise, the constants are placed in the next text pool. If the next text pool is inaccessible (because it does not exist or the distance to it exceeds 4 kb), the assembler reports an error. In this case, an ltorg pseudocommand should be placed in a location close to the instruction after LDR Rd, =.

See the following example (the commands listed as annotations are generated by the assembler ):

Area loadcon2, code

Entry

BL func1

BL func2

SWI 0x11

Func1

LDR r0, = 42 ======> mov r0, #42

LDR R1, = 0x55555555 ======> LDR R1, [PC, # offset to text Pool 1]

LDR R2, = 0 xffffffff ====> MVN R2, #0

MoV PC, LR

Ltorg ======> text Pool 1 contains literal constants 0x55555555

Func2

LDR R3, = 0x55555555 ======> LDR R3, [PC, # offset to text Pool 1]

; LDR R4, = 0x66666666; an error occurs when you comment out this sentence because the text pool 2 is inaccessible (the distance exceeds 4 kb)

MoV PC, LR

Largetable % 4200; clears 4200 bytes of memory from the current position, so that the text pool behind the end is more than 4 kb

End

Note that the text pool must be placed outside the code segment; otherwise, the processor will execute it as an instruction.

 

6 load the address to the Register

It is common to load an address to a register. For example, to load a String constant in a code segment or the starting address of a jump table to a register. However, because arm code can be relocated and the values that can be directly loaded into registers are limited, absolute addresses cannot be used. In this case, the address should be expressed by the offset relative to the current PC, which can be expressed by the current PC and the appropriate offset, or loaded from the text pool.

6.1 ADR and adrl pseudoinstructions

In terms of efficiency, it is very important to load addresses that do not require memory access. Therefore, the assembler provides ADR and adrl pseudo commands. ADR and adrl accept a PC-related expression (tag in the same code segment) and calculate the offset to reach the specified place.

ADR tries to use the same mechanism as LDR Rd, = command to generate a single command for address loading. If the specified address cannot be constructed in a single command, the assembler reports an error. For non-Word Alignment addresses, the offset range is less than 255 bytes. For Word Alignment addresses, the offset range is 1020 bytes (255 words ).

Adrl tries to use two data processing commands for address loading. Even if you can use a single command to complete the operation, the second redundant command will still be generated. If you cannot use two commands to complete the operation, the assembler reports an error. LDR Rd, = may be the best choice. Generally, for non-Word Alignment addresses, the offset range that adrl can process is within 64 KB; for word alignment addresses, the offset range is kb.

See the following example:

Area loadcon3, code
Entry

Start
ADR r0, start ;====> sub r0, PC, # offset from PC to start (8)
ADR R1, dataarea ;===> add R1, PC, # offset from PC to dataarea (8)
; ADR R2, dataarea + 4300; ====> the offset cannot be expressed by the second operand of ADD. An error is returned.
Adrl R3, dataarea + 4300; ====> add R2, PC, # PC offset1 (4096)
; Add R2, PC, # PC offset2 (208)
SWI 0x11

Dataarea % 8000
End

Analysis:

(1) ADR r0, start ====> sub r0, PC, #8

ADR R1, dataarea ====> add R1, PC, #8

Arm uses Pipeline mechanism, the current instruction address is equal to PC-8

(2) adrl R3, dataarea + 4300

The offset address is 4304, because adrl is to be replaced with a two-day instruction. When the PC points to the SWI 0x11 instruction when the first instruction is executed, the offset of dataarea to the PC is + 4, after adding 4300, the final offset address is 4304, which can be expressed as 1024*4 + 208. Therefore, the offset address after adrl is decomposed into two commands is 4096 and 208 respectively.

 

6.2 LDR Rd, = expression relative to PC

Like a number constant, ldr rd and = can also process expressions relative to PCs, such as labels. Even if you can use add or sub to construct the desired address, the LDR command is still generated to load the expressions relative to the PC.

Area loadcon3, code
Entry

Start
LDR r0, = start ;====> LDR r0, [address of the constant that represents the start address in the text pool]
LDR R1, = dataarea; ====> LDR R1, [address that represents a constant of the dataarea address in the text pool]
LDR R3, = dataarea + 4300; ====> LDR R1, [address of a constant representing the dataarea address in the text pool]
SWI 0x11
Ltorg
Dataarea % 8000
End

Analysis: the difference between this Code and section 6.1 is that it replaces ADR or adrl with LDR, so we can see the difference between the two:

• ADR and adrl use an offset expression relative to the PC to load addresses. The address range is limited, but the running time can be saved;
• LDR always stores the required address values in the text pool, and then loads the addresses from the text pool. Memory Access is required and the operation takes a long time.

6.3 Example of loading address to register

The following program contains the strcpy function, which copies the string from one memory address to another. The input function has two parameters: the source string address and the target address. It indicates that the null character ending with the string is also copied.
Area strcopy, code
Entry
Main
ADR R1, srcstr
ADR r0, dststr
BL strcopy
SWI 0x11

Srcstr DCB "this is my first (source) string", 0
Dststr DCB "this is my second (destination) string", 0
Align

Strcopy
Ldrb R2, [R1], #1
Strb R2, [R0], #1
CMP R2, #0
BNE strcopy
MoV PC, LR

End