Tag: New state Operation direct IMG Injection application delay
One, open collector output
1, open collector output principle
Open Drain and open Collector are often encountered in the circuit of the two cases. The "drain" referred to in the concept of the open drain circuit refers to the drain of the MOSFET. Similarly, the "set" in the open collector Circuit refers to the collector of the transistor. In digital circuits, they are referred to as OD gate and OC Gate respectively.
The open collector circuit is a sink current output device. The open-collector output is connected to ground in the off state, and the open collector output is suspended in the on state. Therefore, an open-collector output requires a source current input interface. A simple schematic of an open-collector output circuit is given in the table below.
A typical open collector circuit is shown. The transistor collector on the right side of the circuit is not connected to anything, so called open collector, the left transistor for the inverse effect, that is, the left input "0" when the left transistor cutoff, VCC through the resistor to the right transistor base, the right transistor conduction, the right output terminal connected to the ground, output "0".
The circuit can see that the open collector is unable to output high level, if you want to output high level can be added to the output of the pull-up resistor. Thus, the open collector output can be used as a level shift and pull the pull-up resistor to different voltages to achieve different level transitions.
Used as a drive. As the collector of the output tube of the OC Gate Circuit is suspended, a pull-up resistor RP to the power supply VCC is required for use. The OC door uses a pull-up resistor to output the high level, and in order to increase the drive capability of the output pin, the selection principle of the pull-up resistor value should be large enough from the reduction of power dissipation and the ability of the chip to sink the current capacity; From ensuring sufficient drive current considerations should be small enough.
When the OC Gate output is connected together, a "line-to" logic relationship can be achieved by means of a resistor connected to the external power supply. As long as the resistance and the value of the external supply voltage is selected properly, you can ensure that the output of high and low level of compliance requirements, and output transistor load current is not too large.
Open collector output In addition to the line and logic can achieve a number of connections, through the use of high-power transistor can also be used to directly drive a larger current load, such as relays, pulse transformers, indicators and so on.
2. Application of open collector output
Application One:
Implemented with or non-logic, used as a level shifter, used as a driver. As the collector of the output tube of the OC Gate Circuit is suspended, a pull-up resistor RP to the power supply VCC is required for use. The OC door uses a pull-up resistor to output the high level, and in order to increase the drive capability of the output pin, the selection principle of the pull-up resistor value should be large enough from the reduction of power dissipation and the ability of the chip to sink the current capacity; From ensuring sufficient drive current considerations should be small enough.
Application Two:
The logic function of "and" can be realized by direct interconnection of line and logic, i.e. two outputs (including more than two). In the bus transmission and other practical applications need a plurality of doors in parallel connection of the output terminal, and the general TTL gate output can not be directly connected to use, otherwise these gates of the output pipe between the low impedance of the formation of a large short-circuit current (sink current), and burn the device. On the hardware, the OC Gate or the Tri-State Gate (St Gate) can be used to achieve this. With the OC door to achieve the line and should be at the same time the output port should be added a pull-up resistor.
Application Three:
Three-state gate (TS Gate) is mainly used in multiple gate output shared data bus, in order to avoid multiple gate output simultaneously occupy the data bus, these door enable signal (EN) Only one is allowed to have a valid level (such as high level), because the output of the tri-State gate is a push-pull low-impedance output, and do not need to pull So the switching speed is faster than the OC door, and the three-state gate is used as the output buffer.
second, open-drain output
1. Open-Drain output principle
Like open collector, as the name implies, the open-drain circuit refers to the circuit from the MOSFET's drain output. A typical use is to add a pull-up resistor to the power supply in the circuit outside the drain. The complete open-drain circuit should consist of an open-drain device and an open-drain pull-up resistor. The resistance value of the pull-up resistor R here determines the speed of the rising/falling edge of the logic level translation. The higher the resistance, the lower the speed, and the smaller the power consumption. Therefore, both power and speed should be taken into consideration when selecting the pull-up resistor. Standard open-drain feet generally have only the ability to output. Add other judgment circuit, can have bidirectional input, output ability.
Many MCU and other devices such as I/O is open drain form, or can be configured as an open-drain output form, such as the 51 single-chip P0 port is open drain output. In practical applications, multiple open-drain outputs can be connected to a single line, thus forming a "line-and-logic" relationship. Note that this common point must be connected to a pull-up resistor. When any one of these pins becomes logic 0, the logic on the open-drain line is 0. This method is used to determine bus occupancy status in the I²c interface bus.
As with the open collector, the drive capability of the external circuit is used to reduce the internal drive of the IC. When the IC internal MOSFET is on, the drive current flows from the external VCC through the pull-up resistor and then through the MOSFET to GND. Only a very lower gate drive current is required inside the IC, so open drain is often used in the drive circuit.
2. Features
1) Reduce the internal drive of IC by using the driving capability of external circuit. or drive a higher load than the chip supply voltage.
2) Multiple open-drain pins can be connected to a single line. A pull-up resistor creates a "and logic" relationship without adding any devices. This is also the principle of I2c,smbus bus to determine the state of bus occupancy. If the output of the totem must be connected with a pull-up resistor. When the capacitive load is connected, the falling edge is the transistor inside the chip, which is the active drive, the speed is fast, and the rising delay is the passive external resistor, and the speed is slow. If the speed of high resistance is required to select small, power consumption will be large. Therefore, the choice of load resistance should take into account both power consumption and speed.
3) You can change the transmission level by changing the voltage of the pull-up power supply. For example, add a pull-up resistor to provide ttl/cmos level output, and so on.
4) The open-drain pin does not connect the external pull-up resistor, only the low level is output. In general, the open-drain is used to connect different levels of the device, matching the level of the.
5) The normal CMOS output stage is the upper and lower two tubes, the above pipe is removed is open-drain. The main purpose of this output is two: level shifting and line with.
6) Since the leakage stage open, so the rear circuit must be connected with a pull-up resistor, the power supply voltage of the pull-up resistor can determine the output level. This allows you to convert at any level.
7) line and function is mainly used in the case of multiple circuits to the same signal to pull low operation, if this circuit does not want to pull low, the output high level, because the open-drain above the pipe is taken off, high level is by the external pull-up resistor to achieve. (While the normal CMOS output stage, if one output is high and the other one is low, it is equal to the power supply short circuit.) )
8) Open-drain provides flexible output, but it also has its weaknesses, which is the delay of the rising edge. Because the rising edge is the load charging through the external pull-up passive resistor, so when the resistance choice hour delay is small, but the power consumption is large, and the delay large power consumption is small. Therefore, if the delay is required, it is recommended to use a falling edge output.
3. What is line or logic with line and logic?
On a junction (line), a pull-up resistor is connected to the collector C or drain D of the power supply VCC or VDD and n NPN or nMOS transistors, the emitter e or source s of these transistors are connected to the ground, and as long as a transistor is saturated, the junction (line) is pulled to the ground level.
Because these transistors have a base injection current (NPN) or gate Plus high level (NMOS), the transistor is saturated, so the relationship of these bases or gates to this node (line) is either non-nor logic. If the node is followed by an inverter, it is the or or logic.
Note: Personal understanding: Line and, connect the pull-up resistor to the power supply. (~a) & (~b) =~ (A+b), by the formula easier to understand the origin of the line and this concept;
The use of a pull-down resistor and PNP or PMOS tube can be used to form a non-NAND logic, or to convert and/or logic with a negative logic relationship.
Note: line or, connect the pull-down resistor to ground. (~a) + (~b) =~ (AB);
These transistors are often the open collector OC or open source OD output of some logic circuits. This logic is often referred to as line and/or line or logic, when you see the OC or OD output of some chips connected together, and there is a pull-up resistor, which is the line or/line with the, but sometimes the pull-up resistor is done on the chip input.
By the way, if the output of the OC or OD chip is not connected, the two-way outputs on bus buses are managed together and can only have one output, while the other is high impedance state can only be entered.
Open collector output and open drain output