Original code inverse code complement plus subtraction operation

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when the processor operates on two operands, the result is obtained by unsigned numbers , and the Carry flag C is set accordingly, and the overflow flag V is set based on whether the number of symbols exceeds the range. It is up to the programmer to decide which flag to use. That is, if the operands that participate in the operation are considered to be unsigned, you should care about the rounding, and if you think it is a signed number, be aware of the overflow.

All negative numbers are equal to the original code, and the complement is equal to the inverse code plus one. Hexadecimal is also first converted into a 2-in-process complement. The use of the complement is to let the machine learn to subtract operations. Should be for all the processors are circuits to do, the circuit is actually just adder, can only do addition. How can the computer to do subtraction, with the complement AH. Minus a number equals adding her complement.

The original code addition and subtraction is more complex, you need to judge the number of symbols, and then decide to add or do subtraction operations.

Complement the addition and subtraction operation is relatively simple, using the complement plus subtraction operation, can be "positive plus negative" operation, into a "positive plus positive" operation. The general computer takes the complement to carry on the addition subtraction Operation . Because subtraction can be considered as a negative value of meiosis plus a meiosis, that is, a-b=a+ (-B), the subtraction and addition operations in the machine are discussed together.

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1. The basic formula of complement and subtraction

The basic formula for complement addition is:

Integer [A] complement +[b] complement =[a+b] complement (mod 2n+1)

decimal [A] complement +[b] complement =[a+b] Supplement (mod 2)

. For subtraction

Due to a-b=a+ (-B), [A-b] complement =[a+ (-B)] complement, the basic formula for complement addition can be obtained:

Integer [a-b] complement =[a] complement +[-b] complement (mod 2n+1)

decimal [A-b] complement =[a] complement +[-b] Supplement (mod 2)

[X+y] complement = [x] complement +[y] complement [XY] complement = [x] complement +[-y] complement

Example of the operation process (assuming the machine word length 4 bits, where 1 digits represent the symbol bit):

Examples of addition and subtraction of complement

(a) ( -7) + (+5) (b) (-4) + (+4)

1,001 1,100

0,101 0,100

1,110 =-2 0,000 =0

(c) (+5) + (+4) (d) (-7) + (-6)

0,101 1,001

0,100 1,010

1,001 = Overflow 0,011 = overflow

This phenomenon, which exceeds the word length of a machine, is called an overflow. 1 lose

In the complement fixed-point operation, it is necessary to judge whether the result is overflow.

12. Overflow Judgment

. If the result of the operation is beyond the range of the number that the computer can represent, the result is an error, which is called an overflow.

-For a computer with a word length of n, it can be expressed as a fixed-point complement range of -2n-1≤x≤2n-1-1

– overflow occurs if the result of the operation is less than -2n-1 or greater than 2n-1-1

– A valid bit of the numeric value occupies the symbol bit when overflow occurs.

. Two ways

① uses a symbolic bit to determine overflow

② using two-bit sign bit to determine overflow

Using a sign bit to determine overflow

Two the same number of symbols added, the result of the operation of the symbol should be the same as the addends, otherwise produce overflow;

. The number of different symbols is added, the same symbol number is subtracted, and no overflow is generated.

. Two differences in the number of different symbols, the result of the operation of the symbol should be the same as the meiosis, or overflow.

. Since subtraction is implemented in machines with Adder, the following conclusions are drawn:

– whether it is addition or subtraction, as long as the actual number of two (subtraction is Bing and "after" the meiosis) symbol is the same, the result is different from the original operand symbol, that is, overflow.

Using a sign bit to determine overflow

. Guideline: "Two identical number of symbols added, the result of the operation of the symbol should be the same as being addends, otherwise produce overflow"

– This method of judgment is not easily implemented by hardware.

To determine whether the symbols of the operands are the same, and then to determine whether the symbol of the result is the same as the symbol of the original operand

. It is usually judged by the result of the carry which is produced by the sign bit and the carrying carried out by the most significant bit to the sign bit.

– Overflow If the difference or result is 1 (that is, different);

– If the difference or result is 0 (that is, the same), there is no overflow.

Overflow judgment of addition and subtraction of complement

Example of the operation process (assuming the machine word length 4 bits, where 1 digits represent the symbol bit):

[X+y] complement = [x] complement +[y] complement [XY] complement = [x] complement +[-y] complement

(a) ( -7) + (+5) (b) (-4) + (+4)

1,001 1,100

0,101 0,100

1,110 =-2 10,000 =0

(c) (+5) + (+4) (d) (-7) + (-6)

0,101 1,001

0,100 1,010

1,001 = overflow 1 0,011 = overflow

1 lose

Using two-bit sign bit to determine overflow

-Variant complement

The two-bit sign bit is joined with the numerical part in the addition operation with the variant complement.

. Operation result overflow judgment rule:

– The values of two sign bits are the same when normal

– Two sign bits are different, indicating an overflow occurred.

double sign Bit overflow judgment Method

double symbol Meaning: 00 Indicates the result of the operation is positive;

01 indicates that the result of operation is overflow;

10 indicates that the result of operation is negative overflow;

11 indicates that the result of the operation is negative.

The first sign bit is the true sign bit of the result of the operation.

Example 1 set a valid value of 4,x= -0.1001,y=-0.0101, ask [x+y]=.

Solution: [X] complement = 11.0110+1 = 1 1. 0 1 1 1

+ [Y] complement = 11.1010+1 = 1 1. 1 0 1 1

[X+y] complements = 1 1 1. 00 1 0

The highest bit 1 loses two sign bit same, the result of the operation does not overflow

The final result is: x+y=-0.1110

Example 4 set a valid numerical bit of 4, x= -0.1011,y= 0.0111, and ask [x-y]=.

Solution: [X] complement = 11.0100+1=11.0101

[y] complement = 00.0111 [-y] complement =11.1001

[X] complement = 1 1. 0 1 0 1

+ [-y] complement = 1 1. 1 0 0 1

[X+y] complement = 11 0. 1 1 1 0

Two sign bit 10 is different, the result of the operation is negative overflow.