PC 13: timer usage and Time Acquisition

The operating systems on modern computers are basically multi-task operating systems. Each task takes a small time segment of the system in turn, and the system speed is so fast that every task feels like it occupies the entire computer. At the same time, many time-sensitive programs are running on modern computers, such as regular backup systems and system maintenance every morning. To implement these functions, we cannot do without the need of timing and timing, and the efficient implementation of these requirements is inseparable from the support of hardware. Let's explain what platform PC provides for the software.

RTC
The earliest IBM-PC with RTC real-time clock chip, and battery power supply, with it, the computer has a watch function, RTC is an independent system, even if the PC shut down or power off, it can still work normally, which is also the basis for maintaining the time for the machine to start again after shutdown. RTC is integrated in nanqiao.

Since RTC is an independent system, it is certain whether program commands can access it. In a PC, I/O Ports 0 × 70 and 0 × 71 can be used to read and write registers in the RTC chip. Port 0 × 70 indicates the Register address index port of RTC, and port 0 × 71 indicates the data port. Next, let's look at what the Register address index port can index.

The most common RTC chip is MC146818 (Motorola), with a total of 64 registers. 0 × 00 ~ 0x3f, these registers can be divided into three groups, clock and calendar register group: a total of 10 (0 × 00 ~ 0 × 09), indicating the specific time and calendar information. In a PC, the values in these registers are stored in BCD format (for example, 23dec = 0x23bcd ). Status and control register group: 4 (0x0a ~ 0x0d), controls how the RTC chip works, and indicates the current status. CMOS configuration data: Common cmos ram, which has nothing to do with time, so we do not care about it for the moment. It can be seen that we can read and write the system time through the IO access command at any time.

Pit
Now that time is available, we also need the timer function. So pit (programmable interval timer) appears. Pit is generally implemented with a 8254 chip. The signal source is the crystal oscillator of the motherboard, which is counted based on the clock pulse signal. The storage unit used for counting is 16 bits, therefore, a maximum of 65536 clock signals can be recovered. Generally, the Program sets an initial value, and then automatically decreases by 1 every time a pulse is received. When the value is reduced to 0, an interruption signal is sent to the system for the scheduled function. However, because there is only 16-bit data, the timing time is too short after the frequency is high, and the frequency is low and not accurate enough, it is basically eliminated now. The chip has three channels: Channel 0 is bound to irq0, which is used to increase the time interruption for the operating system. Channel 1 is usually used by the DMA controller to refresh Ram, channel 2 is connected to a PC speaker to generate a square wave signal.

How to use things is software after all. But I have to tell the software what instructions it uses to control him. Like RTC, it is also accessed through Io space. The Count port addresses of the three channels are 40 h, 41 h, and 42 h respectively, plus a control register 43 H. Why should I add a controller? The reason is that each channel counter is 16 bits, but the corresponding port address is 8 bits, so it takes two times to read the entire count, first, you must tell the Controller whether the data you want to read is high 8-bit data or 8th-bit data. At the same time, you can set the working mode for each channel. Each channel can have six working modes. Because pit has been basically eliminated, there is no need to study it. If you are interested, you can use Baidu.

TSC
Starting from Pentium, the CPU provides a register TSC to accumulate the clock signals generated by each external oscillator. That is to say, every time the CPU receives a clock pulse, it modifies the count in the TSC, the corresponding TSC registers are 64-bit, which greatly increases the counting capability. Because the CPU frequency is the highest in the system, the accuracy of the corresponding TSC is very high. The TSC register is read-only and can be read through a separate instruction rdtsc (read TSC.

The problem is that the frequency source obtained by TSC may not be fixed, because the frequency can be reduced to reduce power and save energy when the CPU is idle. So later we came out with hpet.

Hpet high precision timer
Hpet (High Precision Event timer) is commonly known as a high precision timer. It is a replacement for Pit and RTC, providing a higher clock frequency (at least 10 MHz) and a wider counter width. An hpet includes a counter with a fixed frequency value increase and 3 to 32 independent timers, each of which contains a comparator and a register (saving a value, indicates the time when the interruption is triggered ). Each comparator compares the value in the counter with the value in the register. When the two values are equal, an interruption occurs. The hpet configuration is completed by accessing the timer configuration register. This register will be sent to a memory area by mmio (obtained by the BIOS stage ACPI permission), with a size of 1 K (64 bit can be up to 64 K ). For more details, refer to Baidu.