PC Software and PLC serial communication parity problem

Source: Internet
Author: User

PC Software and PLC serial communication baud rate: 19200 Check bit: Even test data bits: 8 stop bit: 1 phenomenon one, the PC software to the PLC can send 1,2,4,5,7,8, but 3,6,9 sent out, PLC could not receive two, using virtual serial port, PC software and serial debugging assistant can communicate for normal reasons in PC software, the check digit is populated according to mark (parity bit always 1) bit. That is, in the above environment, the PC software is the parity check bit 1 sent, the PLC using even test receive, so according to the principle of parity, can explain the phenomenon 3,6,9 can't receive. Parity principle parity check: is to let the original data series (including you want to add a) 1 of the number of odd 1000110 (0) You must add 0 so the original 3 1 is already an odd number, so you add 0 after the number of 1 or odd. Even check: is to let the original data series (including you want to add a) 1 of the number of even 1000110 (1) You have to add 1 so there are 3 1 to think that the number of 1 can only add 1 to the back of which there is a sentence at the beginning did not see: Odd bit error can be detected, even digital bit error cannot be detected actually this , assuming that the use of odd check to send data 1, binary means 0000 0001 sender, the check bit is calculated to 0 (the number of 1 in the data is odd), plus the check bit, the data sent is: 0000 0001 0① Odd bit error, the receiving end of the received data is: 0001 0001, the receiver calculates the result of the check is 1 (the number of 1 in the data is even), the receiving side to see the data received by the Commander is 0, and the check bit is 1, so you can conclude that the received data is wrong. ② even digits cannot be checked out The receiving end receives the data: 0001 1001, the receiver calculates the result of the check is 0 (the number of 1 in the data is odd),The receiving end of the received test bit 0 and its own calculated results of the test 0 consistent with the receiver that the received data is correct. In fact, the error has occurred, to send 0000 0001, received is 0001 1001 This is the so-called "odd bit error can be detected, even digital bit error cannot be detected" problem. Explain the phenomenon of a, PC software to the PLC can send 1,2,4,5,7,8, but 3,6,9 sent out, the PLC can not receive ①PC software to the PLC to send 1,2,4,5,7,8 to 1 (0000 0001) For example, Check digit is filled according to mark (parity bit always 1) bit, PLC parity result 1,PLC receive ②3,6,9 send out, PLC can not receive 3 (0000 0011) For example, check digit according to mark (parity bit always 1) bit fill, plc parity result 0, PLC cannot receive two, using virtual serial port, PC software and serial debugging Assistant can communicate this conclusion for guessing can not see the virtual serial port results. Virtual serial port virtual serial port for serial communication, check bit does not work.

PC Software and PLC serial communication parity problem

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