SPI Protocol Summary

Four modes of operation:

Mode 0 cpol=0, cpha=0
Mode 1 cpol=0, cpha=1
Mode 2 cpol=1, cpha=0
Mode 3 cpol=1, cpha=1

Frequent use of Mode0 and Mode3, i.e. sampling and latching of data on rising edges

COPL: Clock polarity. Represents the idle state level in the absence of a data transfer time clock.

0:SCK PIN in idle state is low

1:SCK PIN in idle state is high

Cpha: Clock phase. Represents the sampling at the edge of the first few clocks.

The first edge of the 0:sck clock is sampled at the data bit, and the data is latched on the first clock edge.

The second edge of the 1:sck clock is sampled at the data bit, and the data is latched at the edge of the second clock.

SPI Protocol Summary