Stm32f4 timer tim1 outputs a seven-way PWM signal [use library function]

[PURPOSE]

The output of 7-way PWM signals with different duty cycles is a required example of each version of the St library. The main purpose of this experiment is not to show the powerful PWM function of the ST chip, but to complete accurate output computation.

[Experiment content]

Output 7-way PWM signal and use the oscilloscope to measure the output.

[Experiment principle]

1. Time Base unit Initialization

When tim1 and tim8 use an internal clock, the clock is provided by apb2. However, the timer clock is not provided directly by apb2, but from a multiplier with the input of apb2. When the dividing coefficient of apb2 is 1, this frequency divider does not work, and the timer clock frequency is equal to the apb2 clock. This frequency divider works when the pre-division coefficient of apb2 is other. The input frequency of the timer is twice that of apb2. In this experiment, the apb2 clock is set to 84m to divide the system clock by two. Therefore, the input clock of the timer is 84m × 2 = 168 m = sysclk. (PS: I did not find this multiplier in the St manual. It is the result of online search. It is correct to compare it with the actual result)

Tim_prescaler is the pre-division value, and the 0-division frequency coefficient is 1.

Tim_period is the Count value of each cycle. Therefore, the value of tim_period is counted from 0. Therefore, the value must be the count minus 1.

Tim_repetitioncounter is a newly added item of F4. It is valid only for the advanced timer tim1 and tim8, and corresponds to the RCR register. This means that every tim_repetitioncounter + one technical cycle is interrupted.

The time base I defined is as follows, which will generate a frequency of 20 KB even though the benchmark:

Timerperiod = (systemcoreclock/20000)-1;

Rcc_apb2periphclockcmd (rcc_apb2periph_tim1, enable );
// Time base Initialization
Tim_timebaseinitstructure.tim_clockdivision = tim_ckd_div1; // used for Dead Zone Control.
Tim_timebaseinitstructure.tim_countermode = tim_countermode_up; // Counter Direction
Tim_timebaseinitstructure.tim_prescaler = 0; // timer clock = sysclock/(tim_prescaler + 1) = 168 m
Tim_timebaseinitstructure.tim_repetitioncounter = 0;
Tim_timebaseinitstructure.tim_period = timerperiod-1; // period = (TIM counter clock/Tim output clock)-1 = 20 K
Tim_timebaseinit (tim1, & tim_timebaseinitstructure );

2. Timing output

CCR1, 2, 3, and 4 are the tim_pulse of each technology cycle. That is, the PWM waveform is reversed whenever these values are counted.

CCR1 = timerperiod/2; // duty cycle 1/2 = 50%
CCR2 = timerperiod/3; // duty cycle 1/3 = 33%
CCR3 = timerperiod/4; // duty cycle 1/4 = 25%
CCR4 = timerperiod/5; // duty cycle 1/5 = 20%

Define output:

Tim_ocinitstructure.tim_ocmode = tim_ocmode_pwm1;
Tim_ocinitstructure.tim_outputstate = tim_outputstate_enable;
Tim_ocinitstructure.tim_outputnstate = tim_outputnstate_enable;
Tim_ocinitstructure.tim_pulse = CCR1;
Tim_ocinitstructure.tim_ocpolarity = tim_ocpolarity_high;
Tim_ocinitstructure.tim_ocnpolarity = tim_ocnpolarity_low; // outputs the same phase. If tim_ocnpolarity_high is used, the output is reversed.
Tim_ocinitstructure.tim_ocidlestate = tim_ocidlestate_set;
Tim_ocinitstructure.tim_ocnidlestate = tim_ocnidlestate_reset;

Tim_oc1init (tim1, & tim_ocinitstructure );

Tim_ocinitstructure.tim_pulse = CCR2;
Tim_oc2init (tim1, & tim_ocinitstructure );

Tim_ocinitstructure.tim_pulse = CCR3;
Tim_oc3init (tim1, & tim_ocinitstructure );

Tim_ocinitstructure.tim_pulse = CCR4;
Tim_oc4init (tim1, & tim_ocinitstructure );

Tim_cmd (tim1, enable );
Tim_ctrlpwmoutputs (tim1, enable );

3. The timer configuration is completed here. below is the configuration of the gpio pin.

Use the 8, 9, 10, 11, 12, 13, and 14 pins of gpioe for PWM output. The configuration is as follows:

Void tim1_gpio_config (void)
{
// PE 8 9 10 11 12 13 14 output
Gpio_inittypedef gpio_initstructure;
Rcc_ahb1periphclockcmd (rcc_ahb1periph_gpioe, enable );
Gpio_initstructure.gpio_mode = gpio_mode_out;
Gpio_initstructure.gpio_otype = gpio_otype_pp;
Gpio_initstructure.gpio_pin = gpio_pin_8 | gpio_pin_9 | gpio_pin_10 | gpio_pin_11
| Gpio_pin_12 | gpio_pin_13 | gpio_pin_14;
Gpio_initstructure.gpio_pupd = gpio_pupd_nopull;
Gpio_initstructure.gpio_speed = gpio_speed_100mhz;
Gpio_init (gpioe, & gpio_initstructure );

Gpio_pinafconfig (gpioe, gpio_pinsource8, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource9, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource10, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource11, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource12, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource13, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource14, gpio_af_tim1 );
}

Output Waveform:

When the same phase is output:

Oc1/oc1n

Oc2/oc2n

Oc3/oc3/n

Oc4

Reverse output

Oc1/oc1n

Oc2/oc2n

Oc3/oc3/n

Oc4

Complete applicationCode:

Only two lines are supported.

// Main function call

Timeregpio_config ();
Timereconfig ();

// Initialize the timer output pin

Void tim1_gpio_config (void)
{
// PE 8 9 10 11 12 13 14 output
Gpio_inittypedef gpio_initstructure;
Rcc_ahb1periphclockcmd (rcc_ahb1periph_gpioe, enable );
Gpio_initstructure.gpio_mode = gpio_mode_af;
Gpio_initstructure.gpio_otype = gpio_otype_pp;
Gpio_initstructure.gpio_pin = gpio_pin_8 | gpio_pin_9 | gpio_pin_10 | gpio_pin_11
| Gpio_pin_12 | gpio_pin_13 | gpio_pin_14;
Gpio_initstructure.gpio_pupd = gpio_pupd_nopull;
Gpio_initstructure.gpio_speed = gpio_speed_100mhz;
Gpio_init (gpioe, & gpio_initstructure );

Gpio_pinafconfig (gpioe, gpio_pinsource8, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource9, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource10, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource11, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource12, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource13, gpio_af_tim1 );
Gpio_pinafconfig (gpioe, gpio_pinsource14, gpio_af_tim1 );

}

// PWM output by tim1
void tim1_config (void)
{< br> timerperiod = (systemcoreclock/20000)-1;
CCR1 = timerperiod/2; // duty cycle 1/2 = 50%
CCR2 = timerperiod/3; // duty cycle 1/3 = 33%
CCR3 = timerperiod/4; // duty cycle 1/4 = 25%
CCR4 = timerperiod/5; // duty cycle 1/5 = 20%
rcc_apb2periphclockcmd (rcc_apb2periph_tim1, enable );
// time base initialization
tim_timebaseinitstructure.tim_clockdivision = tim_ckd_d Iv1; // used for Dead Zone Control.
tim_timebaseinitstructure.tim_countermode = tim_countermode_up; // counter direction
counter = 0; // timer clock = sysclock/(tim_prescaler + 1) = 168 m
Limit = 0;
tim_timebaseinitstructure.tim_period = timerperiod-1; // period = (TIM counter clock/Tim output clock)-1 = 20 k
tim_timebaseinit (tim1, & tim_timebaseinitstructure );

Signature = tim_ocmode_pwm1;
Signature = tim_outputstate_enable;
Signature = tim_outputnstate_enable;
Signature = CCR1;
Signature = tim_ocpolarity_high;
frequency = tim_ocpolarity_high;
frequency = tim_ocidlestate_set;
frequency = frequency;
tim_oc1init (tim1, & tim_ocinitstructure);

response = CCR2;
tim_oc2init (tim1, & tim_ocinitstructure);
response = CCR3;
tim_oc3init (tim1, & tim_ocinitstructure );
tim_ocinitstructure.tim_pulse = CCR4;
tim_oc4init (tim1, & tim_ocinitstructure);
tim_cmd (tim1, enable );
tim_ctrlpwmoutputs (tim1, enable);
}