STM8 infrared capture resolution using TIM1 16-bit advanced control timer

TIM1 16-bit advanced control timer


The advanced control timers have different uses:
1, the basic timing.
2. Measure the pulse width of the input signal (input capture)
3. Produce output waveform (output comparison, PWM and single pulse mode)
4, corresponding to different events (capture, comparison, overflow, braking, triggering) of the interruption.


The clock source of the advanced control timer can be either an internal clock or an external signal, which can be selected through the configuration register.


Up to 4 independent channels can be configured
1. Input capture
2. Output comparison
3. PWM generation
4, single pulse mode output


static void Tim1_init (void)
{
/* Set the Prescaler value */
TIM1->PSCRH = (U8) (prescaler_tim1 >> 8);//f_time1 = f_sys/(prescaler_tim1 + 1)
TIM1->PSCRL = (U8) (PRESCALER_TIM1);


/* Set the Autoreload value */
Tim1->arrh = (U8) (0xFFFF >> 8);
TIM1->ARRL = (U8) (0XFFFF);
/* Select the Counter Mode */
TIM1->CR1 = (U8) (((TIM1->CR1) & (U8) (~ (Tim1_cr1_cms | tim1_cr1_dir))) | TIM1_COUNTERMODE_UP);//Control register


/* Set the repetition Counter value */
TIM1->RCR = 0;
}




@far @ interrupt void Tim1_cap_com_irqhandler (void)
{
Volatile U16 last, width;
volatile static U16 cur;
U8 ret;


/* CHN1 Interrupt *///tim1->ier interrupt enable register
if ((Tim1->ier & Tim1_ier_cc1ie) && (TIM1->SR1 & tim1_sr1_cc1if))
{
TIM1->SR1 &= (U8) (~tim1_sr1_cc1if);//TIMA_SR1 TIM1 status Register
Tim1->ccer1 ^= tim1_ccer1_cc1p; Reverse the capture edge
last = cur;
cur = tim1_getcapture1 ();
ir_eng.g_overflow_cnt = 0;


if (ir_eng.g_ir_state = = Ir_start)
{
/* Start to receive wave */
Ir_eng.g_ir_state = ir_ing;
Return


}
else if (ir_eng.g_ir_state = = ir_ing)
{
width = cur-last;
ret = Push_wave (&_irwave, width);
if (ret = = 0)
{
/* Type ahead upper Limit */
Ir_eng.g_ir_state = IR_SUCC;
Notify (Ev_ir_finish);
Stop_capture ();
}
Return
}
}


/* CHN1 Interrupt */
if ((Tim1->ier & Tim1_ier_cc2ie) && (TIM1->SR1 & Tim1_sr1_cc2if))
{
TIM1->SR1 &= (U8) (~tim1_sr1_cc2if);


ret = Get_nth_width (&_irwave, Ir_eng._cur_send_bit, &width);
if (0x00 = = ret) | | (Ir_eng._cur_send_bit >= ir_eng._cur_wave_bit))
{
Stop_compare ();
Ir_eng.g_ir_state = Ir_idle;
Return
}
ir_eng._cur_send_bit++;


if (Width & 0x8000)
{
Pwm_stop ();
}
Else
{
Pwm_start ();
}
NEXT_LBL:
cur = tim1_getcapture2 ();
Width &= 0x7FFF;
Cur + = width;
Tim1_setcompare2 (cur);
}
}




TIM1_CR1:TIM1 Control Register 1
TIM1_CR2:TIM1 Control Register 2
TIM1_SMCR:TIM1 Slave Mode control register
TIM1_ETR:TIM1 External Trigger Register
Tim1_ier: Interrupt Enable register


TIM1_SR1: Status Register 1
TIM1_SR2: Status Register 2
When the capture event occurs, the bit is set by hardware 1, and it is cleared by software 0


Tim1_egr: Event Generation Register
TIM1_CCMR1: Capture/Compare mode Register 1
TIM1_CCMR2: Capture/Compare Mode Register 2
TIM1_CCMR3: Capture/Compare Mode Register 3
TIM1_CCMR4: Capture/Compare Mode Register 4


Tim1_ccer1: Capture/Compare enable Register 1
Tim1_ccer2: Capture/Compare enable Register 2


TIM1_CNTRH: Counter 8 bits High
Tim1_cntrl: Counter 8 bits Low
TIM1_PSCRH: Prescaler 8 bits high
TIM1_PSCRL: Prescaler Low 8-bit


TIM1_ARRH: Auto Reload Register high 8 bit
TIM1_ARRL: Auto Reload register low 8 bit
When the value of the automatic reload is empty, the counter does not work.


TIM1_RCR: Repeat Count Register
TIM1_CCR1H: Capture/Compare Register 1 high 8-bit
TIM1_CCR1L: Capture/Compare Register 1 Low 8-bit


TIM1_CCR2H: Capture/Compare Register 2 high 8-bit
TIM1_CCR2L: Capture/Compare Register 2 low 8-bit
TIM1_CCR3H: Capture/Compare Register 1 high 8-bit
TIM1_CCR3L: Capture/Compare Register 1 Low 8-bit
TIM1_CCR4H: Capture/Compare Register 1 high 8-bit
TIM1_CCR4L: Capture/Compare Register 1 Low 8-bit
TIM1_BKR: Brake Register
TIM1_DTR: Dead-Zone Register
TIM1_OISR: Output Idle status register