USB OTG Insertion detection recognition

A USB pin typically four lines, defined as follows:

To support OTG features, the Mini/micro USB interface extends an ID pin (4th foot)

A device-side ID foot is grounded, the initial state is host, such as PC and the OTG device support device

b device-side ID foot is dangling, default pull-up is high, the initial state is device, such as USB flash drive and when OTG device is enabled to do slave device

1. If you need to support OTG for mobile devices, the internal ID pin requires a default pull-up to high

2. Vbus is the input-output bidirectional pin. For device is the power supply input pin, a 5V power supply output to the device is required for host.

Two USB insertion detection process, see below a simple circuit, Samsung Exynos4412 platform:

Circuit Description: CON1 is a micro USB connector, Vbus connection system Xuotgvbus foot, while providing an interrupt output pin to XEINT28

At the same time the external one dc5v through the control chip also output to the Xuotgvbus, as host need to use to the external power supply

ID pin pull 1.8V as host/slave detection while providing another interrupt input pin to XEINT29

The device supports OTG, following the discovery process for the device:

When inserting a PC port from a device:

1. The system detects the XEINT28 rising edge on the Vbus trigger interrupt, because the PC side will have a 5V from the vbus to come over, into the interrupt processing function to further confirm the ID foot status, the ID foot is low state error, the ID foot for high indicates that the device should switch to the slave device mode

2. Notify USB gadget Enable Vbus and enable PHY according to device mode. Gadget registered an SPI soft interrupt IRQ_USB_HSOTG at probe to respond to data reception

3. Turn on USB CLK to enable PHY, at which point the external 5V power supply system Xuotgvbus,gadget receive IRQ_USB_HSOTG interrupt request to restart OTG core

4. USB DP (High-speed device is DP, low-speed device is DM) on the production of a high-level pulse, when the PC recognizes a USB device insertion, Windows prompts the user

5. Follow-up is the process of Setup,get Discriptor

As the primary device discovery device is plugged in:

1. The system detects the XEINT29 falling edge on the ID foot (the actual plug is inserted into the top of the fifth foot), into the interrupt processing, switch to the main device mode

2. Off interrupt, enable dc5v to Vbus power, wake EHCI and OHCI

3. USB core registers a kernel thread named KHUBD when the kernel is initialized, and the port event is monitored by KHUBD. (The actual process I understand is that when powered by Vubs, a high-level pulse is generated on the DP or DM

EHCI recognition of device insertion after receiving pulse signal, just understand, this is not verified)

3. KHUBD get Port,speed to EHCI, Next is the Setup,get discriptor process of USB

USB OTG Insertion detection recognition