AMD and inteCPU is not just L2The main difference is thatLet's take a look .----------------------------------------------------- The CPU processing performance should not be viewedClock speed, while Intel isIs based on a considerable numberPeople do not know about CPU,The practice of using a longer PipelineTo increase the frequency, thus misleadingA considerable number of people are blindPurchase. CPU processing capabilityThe force can be viewed as follows:Actual processing capability = clock speed *For execution efficiency, use p4e.In other words, the clock speed is fast.After a longer pipeline base is usedAnd onlyThe execution speed of each level of pipelines is as follows:It is irrelevant to the execution efficiency.The benefits of Long Pipelines lies inPipeline execution speed is fast,But the longer the pipeline (the higher the levelMore) the lower the execution efficiency,AMD's prvalue mayThis makes everyone confused,Yes, but they are objectively dividedAbility of the processorForce. Why is the actual frequency onlyRun the amd 2500 + processor with GBThe speed is 2.4 faster than the actual frequency.G P4-2.4B alsoFast? Why 0.1Tula of 3 micron processMost tin core processorsThe height can only be 1.4 GB,Instead, it uses 0.18 micronWillame OF THE PROCESSHoweverCan it be easily achieved 2 GB? BelowLet's analyze it to the end.What causes the above two problems?The existence of "strange circles.Each CPU has a "RunningThe existence of line MPs queue(Hereinafter referred to as "Pipeline "), Pipeline for CPU offSimilar to the assembly line andRelationship between vehicles. CPThe U pipeline is not physical.For data input and outputPipeline or channel, which isObtained by executing the command"What to do next". Execution of each instructionAll must go through the same steps.Level ". "Level "tasks include under BranchCommands and points to be executed in one stepCalculation Result and score of supporting dataStorage location and execution of supporting resultsLine operations ...... The most basic CPU pipeline is availableIt can be divided into 5 levels: 1. Obtain command 2. Translate command 3. Calculate the operand 4. Execute Command 5. store it in the cache. You may find thatLevel 5 description of each levelAre very general, at the same timeIf some special levels are addedThe pipeline will be extended.: 1. Get command 1 2. GET command 2 3. Translate command 1 4. Translate command 2 5. Calculate the operand 6. Assign operation 7. Confirm 8. Execute Command 9. Store to Cache 110. Storage to high-speed cache2 whether it is the most basic pipeline orIs the extension of the pipeline is requiredThe same task must be completed:Output operation result by command. The difference between the two is:The former has only 5 levels, each of whichLevel 10Process more work at each level. IfIf the details are identical,Then you must want to useLevel 5 ManagementLine, the reason is very simple: DataFilling level 5 is more than filling 10Level is much easier. And ifThe processor pipeline is not alwaysIf the data is fullWill lose valuable execution efficiency-- This means CPUThe execution efficiencyIs greatly reduced. The length of the CPU PipelineWhat is the difference? -- ItsThe key is that the pipeline length is notIs a simple repetition.It putsSo that each levelThereforeCompleted in "level 10" ModeThe time required for each level of workObviously faster than the "5-level" model. Slowest (also the most complex)Is determined by the "level" structure.For each"Speed-Please be firmRemember this! We assume that the firstIn line mode, each level requires oneThe clock cycle is the slowestWhich can be completed within 1nsThen, based on this pipelineThe CPU clock speed of the structure can beTo reach 1 GHz (1/1ns = 1 GHz ). Current situationCondition is the pipeline level in the CPUMore and moreSignificantly shorten the clock cycleProvide equal to or higher than shorterPipeline processor performance. GoodIn a long pipelineWork done within the clock cycle minusLess, so even if the processorThe frequency is increased, but each timeThe clock cycle is shortened.The time used is equalShould be reduced, and thus canMake the CPU run at a higher levelFrequency. If the secondPipeline mode.Clock speed increased to 2 GHzSo we should be ableTo the equivalent of the original ProcessorTwice the performance-ifIf the line remains fully loaded.But this is not the case.The CPU internal pipeline is in the pre-There will always be errors when readingIf an error occursThe command must be removed fromLevel 1 pipeline starts to be reexecutedLine. Just calculate it.To draw a conclusion:CPU with 5-level PipelinesWhen executing a commandWhen the execution reaches 4thError.Start to execute this command againThe speed is fasterThe CPU of level 10 pipelines isRepeat when error occurs in level 8th PipelinesExecution is much faster, that isWe cannot do enough.Use all CPU resourcesWhy do we still needWhat about a CPU with a higher clock speed??? Back a few years ago, let meLet's take a look at 1.4ghZ and Ghz respectivelyTencent 4 processor just came outFirst case: intCompany elMore pipelines of level 10 ProcessorsTo the level 20 of Pentium 4,Pipeline length increased by 100%. First listed 15 GHz Pentium 4 ProcessingIt was difficult, too longThe negative effects of PipelinesIt is because of the output of the pre-read commandExecution efficiency caused by errorsSeriously low, or even none at allSame speed as 1 GHzTeng three processor is opposite,The obvious advantage is thatBecause 2Level 0 pipelines and level 10 pipelinesCompared to the execution of each level of PipelinesThe execution time is shortened, althoughThe efficiency is reduced, but the processorThe frequency is based on each level of PipelinesDepends on the execution timeThe execution efficiency is irrelevant.That is why 0 is used.Wil in 18 micron processLamette CorePentium 4 processor supports clock speed2G secrets are easy to achieve!Of course, more sophisticated ManufacturersIt can also improve the processing capabilityClock speed plays a role when Pentium4-In 0.13 micron formatNorthw of Manufacturing ProcessThe advantage of clock speed after the Ood CoreIt is shown in large scale, alwaysRushed to 3.4 GB, long tubeThe online CPU is only in masterIn case of FrequencyAdvantage-high frequencyRate and short clock periodMake up for it in the pre-read command outputWhen an error occurs, the command is re-executed.The time of the fee. However, it has 20 levels of PipelinesAnd 0.13 micronNorthwoo of ChengD Core Pentium 4 processorThe theoretical frequency limit of is 3.5 Gb. What should I do? INtel always uses"Lengthen the pipeline.How to Improve the clock speed --New presCott core Pentium 4Processor (commonly known as P4-E), Actually uses 31 levelsPipeline, through the above introduction,Obviously, we can get PREscott CoreFour processors in one clock weekThe processing efficiency is higherUse NorthwoodThe core vcpu is slower.That is to say, at firstThe P4-E is not better than P4.-C is fast, although P4-E has a greater level 2 slowdownBut at the same frequency, P4-E is definitely not P4-C's competitor, only when p4-E clock speed increased to 5G or above, it is possible4-3.4c CPUPeer, the famous CPU EfficiencyAble to test the software superpi.In response to this gap: p4-3.4e processor,Calculate pI value after decimal point 10 thousand bits take 47 seconds,This is only equivalent to P4-2.4c, while P4-3.4c operation only requires 31 second, put P at the same frequency4-3.4e far awayBehind !! AMD 2500 + ProcessorsLevel 10 pipelines used, onlyG clock speedCompetitor's 4G P4, Apple's G4 processor, and moreLevel 7 pipelines used, only 1. 2g clock speed can matchP4 of 2.8c.All thanks to shorter PipelinesHigher execution efficiencyRate.Efficiency intel lossOn the pipeline length, but the mainIntel for Frequency improvementWin again on the pipeline length,Because compared with the "Pipeline ",A lot of professional problemsThe number of consumers is still unfamiliar,People only know thatThe higher the clock speed, the faster"This one-sided, wrong,Absurd theory !! This isIntel's knowledge!!