[ZigBee] 6, ZigBee basic Experiment--timer 3 and Timer 4 (8-bit timer)

The previous section said 16-bit Timer 1, this section is about 8-bit timer 3 and timer 4!

1. Overview

Timer 3 and Timer 4 are two 8-bit timers (8-bit timers). Each timer has a dual independent capture/compare channels (separate capture/compare channel), each using one I/O pin per channel.

　　Features:

· Capture/compare Channels
· Set, clear or toggle output Compare
· Clock prescaler for divide by 1, 2, 4, 8, 16, 32, 64, 128 (crossover)
· Interrupt request generated on each capture/compare and Terminal-count event
· DMA Trigger function

2, 8-bit Timer Counter

　　#如何设置周期 # Timer 3 and Timer 4 All functions are based on 8-bit timing counters. The counter increments or decrements at each clock edge. the period of the active clock edge can first be set by the register clkconcmd.tickspd[2:0], the finer divide can be set by the txctl.div[2:0] register (where x refers to the timer number, 3 or 4 ). The counter operates as either a free-running counter, a down counter, a modulo counter or an up/down counter (free run counter, inverted counter , modulo counter, or positive/reverse counter).

　　#如何读取计数器的值 # It is possible to read the 8-bit counter value through the SFR register txcnt, where x refers to the timer number , 3 or 4.

　　#停止和开始控制 # The Purge and pause timers are implemented via the Txctl control register. The counter is started when a 1 are written to Txctl.start. If a 0 is written to Txctl.start, the current value remains.

3, Timer 3/timer 4 Mode Control

In general, the control register Txctl are used to control the timer operation.

3.1 free-running mode (free counting)

In this mode, the timer starts from 0x00 and increments each rising edge. When the value reaches 0xFF, the timer is reset to 0x00 and continues to count. When the end reaches 0xFF (for example: an overflow occurs), the interrupt flag bit TIMIF.TXOVFIF is set to 1. If the corresponding interrupt shield bit Txctl.ovfim is set to 1, an interrupt request is generated. The free-running mode can be used to generate independent time intervals and output signal frequencies.

3.2 Down mode (inverted count)

After the timer is started, the counter loads the contents of the TxCC0 in reverse counting mode. The counter then counts down until 0x00. When 0x00 is reached, the flag is set to TIMIF.TXOVFIF. If the corresponding interrupt shield bit Txctl.ovfim is set, an interrupt request is generated. The timer inverted count mode is typically used for applications that require an event timeout interval.

3.3 Modulo Mode (model)

When the timer is running in modulo mode, the 8-bit counter starts at 0x00 and increments each active clock edge. When the counter reaches the final count value contained in the register TxCC0, the counter resets to 0x00 and continues to increment. When this event occurs, the flag imif.txovfif is set. If the corresponding interrupt shield bit Txctl.ovfim is set, an interrupt request is generated. Modulo mode can be used for applications that are not 0xFF in duration.

3.4 Up/down Mode (positive/reverse count)

In positive/Reverse count Timer mode, the counter repeats from 0x00 until the value contained in TxCC0 is reached, and the counter is counted until 0x00 is reached. This timer mode is used for applications that require a symmetrical output pulse and are not 0xFF in duration. Therefore it allows the implementation of the Center-aligned PWM output application.

　　Note: clearing the counter by writing to the TXCTL.CLR also resets the count direction, which is the positive count from 0x00 mode!!!

These four modes are not very different, the free mode is from 0x00 to 0xFF, then from 0x00 to 0xFF; the countdown mode is counted from the SetPoint (TxCC0) until 0x00; modulo mode is from 0X00->TXCC0, The previous loop is then repeated from 0x00, and the positive-down count mode differs from the modulo mode when the TxCC0 is reached and is counted backwards from TxCC0 to 0x00.

4. Channel Mode control

For channels 0 and 1, the mode for each channel is set by the control and status register Txcctln, where n is the channel number 0 or 1. Settings include capture and compare modes.

5. Input Capture Mode

When a channel is configured as an input capture channel, the channel-dependent I/O PIN is configured as an input. After the timer starts, a capture is triggered on a rising edge, falling edge, or any edge on the input pin, capturing 8-bit counter content into the relevant capture register. Therefore, the timer can capture the time when an external event occurs.

　　Note: before the timer uses an I/O pin, the required I/O PIN must be configured as a timer 3/Timer 4 peripheral pin.

The channel input pin is synchronized with the internal system clock. Therefore, the minimum duration of pulses on the input pins must be greater than the system clock cycle. The contents of the 8-bit capture register for channel n is read from the register T3CCN/T4CCN. When a capture occurs, the interrupt flag corresponding to the actual channel is set. This is timif.txchnif. If the corresponding interrupt shield bit txcctln.im is set, an interrupt request is generated.

　　Insert a sentence: this input capture in the design of car reversing radar-multi-channel ultrasonic distance measurement is very useful, once the external ultrasonic receiving part of the filter circuit generated a level change will be captured to the point of time, used to calculate the distance.

6. Output comparison mode

In output comparison mode, the I/O pins associated with the channel must be set to output. After the timer starts, the content of the counter is compared with the contents of the channel Compare register txcc0n. If the comparison register equals the contents of the counter, it is based on the comparison output mode txcctl.cmp1:0 settings, the output pin is set to 1, reset 0, or switch. Note When running in a given comparison output mode, all edges on the output pin are run without fault.

For simple PWM use, output compare modes 4 and 5 is preferred.

Writing to compare register TxCC0 or TxCC1 does do effect on the output compare value until the counter value is 0x0 0.

When a comparison occurs, the corresponding interrupt flag bit for the actual channel is set. The interrupt flag bit is: timif.txchnif. If the corresponding interrupt shield bit txcctln.im is set, an interrupt request is generated. (CC2530 interrupt Request generation now seems to need to set the corresponding interrupt screen bit!) ）

A Compare output pin is initialized to the value listed in Table 6-1 when:

?? ' 1 ' writes to TXCNTR. CLR (all timers x Channels)
?? 0x7 write to TXCCTLN.CMP (timer x, Channel N)

Initial comparison output value (comparison mode)

7, Timer 3 and Timer 4 interrupt

Each of the two timers is assigned an interrupt vector. They are T3 and T4. When one of the following timer events occurs, an interrupt request is generated:

Counter reaches final count value
Compare events
Capturing events

The SFR register TIMIF contains all interrupt flags for timer 3 and timer 4. The register bits timif.txovfif and timif.txchnif contain 2 final count value events, and four channel capture/compare interrupt flags for events. an interrupt request is generated only if the corresponding interrupt screen bit is set . If there are other pending interrupts, the corresponding interrupt flag must be cleared through the CPU before a new interrupt request is generated. Also, if the corresponding interrupt flag is set, enabling an interrupt mask bit will result in a new interrupt request.

8, Timer 3 and timer 4 DMA trigger

There are two DMA triggers associated with timer 3, and there are also two DMA triggers associated with the timer 4. These triggers are as follows:

T3_ch0: Timer 3 Channel 0 capture/Compare
T3_CH1: Timer 3 Channel 1 capture/Compare
T4_ch0: Timer 4 Channel 0 capture/Compare
T4_ch0: Timer 4 Channel 1 capture/Compare

9. Example

Described in the previous section of the TIMER1 has been introduced, here Timer3 initialization is similar, referring to T3ctl can understand the meaning of the initialization settings, of course, it is necessary to open T3ie interrupts and total interruption. The interrupt request is then received by the corresponding interrupt function.

Code:

1 /****************************************************************************2 * File name: main.c3 * Version: 1.04 * Description: Timer T3 control LED1 periodic flicker via interrupt mode5 ****************************************************************************/6#include <ioCC2530.h>7 8typedef unsignedCharUchar;9typedef unsignedint  UINT;Ten  One #defineLED1 P1_0//P1.0 Port Control LED1 A  - UINTCount//for timer counting -  the /**************************************************************************** - * Name: initled () - * Function: Set the corresponding IO port of the LED lamp - * Entry parameters: None + * Export parameters: None - ****************************************************************************/ + voidInitled (void) A { atP1dir |=0x01;//P1.0 defined as output -LED1 =1;//make the LED1 lamp power off by default - } -  - /**************************************************************************** - * Name: InitT3 () in * Function: Timer initialization, the system does not configure the operating clock by default is 2, that is, 16MHz - * Entry parameters: None to * Export parameters: None + ****************************************************************************/ - voidInitT3 () the {      *T3ctl |=0x08;//Open Overflow Interrupt  t3ie = 1; // Open Total Interrupt and T3 interrupt Panax NotoginsengT3ctl |=0xE0;//128 Frequency, 128/16000000*n=0.5s,n=62500 -T3ctl &= ~0x03;//Auto Reload 00->0xff 62500/255=245 (times) theT3ctl |=0x10;//Start+   EA = 1; // Open Total Interrupt  A } the  + //Timer T3 interrupt handling function - #pragmaVector = T3_vector $__interruptvoidT3_ISR (void)  $ {  -IRCON =0x00;//can be automatically completed by the hardware. -     if(count++ >244)//led reversed after 245 interrupts, flashing round (approx. 0.5 sec. time) the{//The oscilloscope measurement ensures accurate -Count =0;//Count Clear 0WuyiLED1 = ~led1;//change the state of LED1 the     }  - } Wu  -  About /**************************************************************************** $ * Program Entry function - ****************************************************************************/ - voidMainvoid) - { AInitled ();//set the corresponding IO port of the LED light +InitT3 ();//setting the appropriate register for the T3 the      while(1) -     {}; $}

ZigBee Series Articles:

[ZigBee] 1, ZigBee introduction

[ZigBee] 2, ZigBee development environment construction

[ZigBee] 3, ZigBee basic experiment--gpio Output control experiment-control LED light off

[ZigBee] 4, ZigBee basic experiment--interrupt

[ZigBee] 5, ZigBee basic Experiment--graphics and code detailed timer 1 (16-bit timer) (long text)

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[ZigBee] 6, ZigBee basic Experiment--timer 3 and Timer 4 (8-bit timer)