[Country EMBED strategy] [152] [Introduction to I²c Bus]

IIC Electrical characteristics

The I²c (Inter intergrated circuit) bus is a two-wire serial bus developed by PHILPS Corporation to connect microcontrollers and peripherals.

The I²C bus has only two bidirectional signal lines:

Sda:serial Date Line Data cable

Scl:serial Clock Line

Bus addressing

The I²C bus specifies that the 7-bit address is used from the device. D7-D1: From the device address. D0: The direction of data transmission, when 0 indicates that the primary device writes data to the slave device, and 1 indicates that the primary device reads data from the device. When the primary device sends an address, each slave on the bus compares the 7-bit address code to its own address and, if the same, considers itself to be addressed by the main device, confirming itself as a transmitter or receiver based on the r/w bit.

The address from the device consists of a fixed part and a user-defined part:

1. Fixed part: D7-d4 A total of 4 decisions. This is the value that has been determined by the manufacturer of the device from which it was produced.

2. User-defined part: D3-d1 A total of 3 decisions. These three bits usually correspond to the 3 pins (A0-A2) of the device. A 3-bit value can be formed by connecting the 3 pins to different levels.

Idle state

The SDA and SCL two signal lines of the I²C bus are at high level at the same time, and the bus is provided as idle state.

Start state

When the clock line SCL remains high, the level on the data line SDA is pulled low (and negative jump), defined as the start signal of the I²c bus, which marks the beginning of a data transfer.

End State

When the clock line SCL remains high, the data line SDA is released, allowing SDA to return a high level (i.e. positive jump), called the I²C bus stop signal.

Data transmission

All data (addresses and data) on an I²C bus is transmitted in 8-bit-byte units.

Answer data

Each time the transmitter sends a byte, it releases the data line at the 9th bit of the clock signal pulse, and the receiver feeds back a response signal. When the response signal is low, it is considered to be a valid ACK, indicating that the receiver has successfully received the byte, the response signal is high, and the invalid answer Nack, indicating that the receiver did not successfully receive the byte.

[Country EMBED strategy] [152] [Introduction to I²c Bus]