(Formerly known as "Hal") How can I allow niosii to automatically capture its own IP address? (SOC)

Abstract
When using the IP address provided by Altera, such as UART, DMA... and so on. You only need to add the IP address to be used in the FPGA builder. After the correct header file is included in the C statement of the niosii, the IP address of your own region can be used normally. Why, you must also set Hal *. c. Can I renew my account only when I reach the project's destination?

Introduction
Use environment: Quartus II 8.1 + NiO II eds 8.1 + DE2-70 (Cyclone II ep2c70f896c6n)

In the DE2-70 CDDe2_70_nios_host_mouse_vgaIn the example, the example is as follows:Seg7.cAndVGA. cThey are all IP addresses of Youjing technology:Terasic_seg7AndTerasic_binary_vga_controllerHal,During the niosii debugging, you must upload the Hal certificate to the project, so that the gcc of the niosii eds can be used.Certainly, there is nothing wrong with it, but it is always troublesome. Why cannot the IP address of your own website be the same as the IP address provided by Altera? Can it be used as long as the FPGA builder is added?

All the reasons,A major change was made in the later part of the Ubuntu II 7.0 system: the system does not pack Hal !!I don't know why Altera wants to remove this function. In general, the better the system is, the better the system is, and the more powerful the avron bus is,However, with Hal support, middleware is not as useful as Quartus II 6.1.. However, in reality, from Quartus II 7.0 to the current Quartus II 8.1, the system does not support Hal packaging,Therefore, this action must be manually performed.In order to enable the system to automatically capture Hal, instead of manually accessing *. C to the project.

A typical IP address, as shown in the following figure. In practice, under c: \ Altera \ 81 \ IP \ Altera \ sopc_builder_ip, the IP address provided by Altera can be used to study how Altera implements Hal.

The external region Inc is placed in the register map of the vulgar region, which is constructed by Macro.
Hal Inc, put the Hal header files, while SRC put the Hal source code.

So do you want to initialize register map? Altera suggests that you want to renew it, but if you steal it, you can just provide Hal without using register map, in this way, the IP address of your region can be used in the same way.

Solution
Step 1:
Add component. mk under Hal \ SRC

When component. mk was in US us II 6.1, the system helped us package Hal into component. mk. Now we have to build it manually.

# List all source files supplied by this component.

C_lib_srcs +=Seg7.c

Asm_lib_srcs +=

In this example, the description of Hal's *. C program is written. If you have many *. C program, you can learn the UART coding method.

# List all source files supplied by this component.

C_lib_srcs +=Altera_avalon_uart_fd.c \
Altera_avalon_uart_init.c \
Altera_avalon_uart_ioctl.c \
Altera_avalon_uart_read.c \
Altera_avalon_uart_write.c

Asm_lib_srcs +=

Include_path +=

After this file is added, the nioii eds will catch this * during the upload *. c. You no longer need to manually renew your project.

Download the complete program
This example is based on the terasic_seg7 IP provided by Youjing Technology Co., DE2-70. CD, with the component. mk Technique of this article.
De2_70_nios_10_seg7.16.7z

Conclusion
Although it's just a little trick, it's not mentioned in the examples of Youjing technology and many others, even in the hands of Altera, maybe this is the part that the system must do. However, the system does not have to manually remove this feature.