FPGA and Simulink combined real-time loop series-opening

FPGA and Simulink combined real-time loop series-opening

Today, the FPGA development process is bound to involve a process: verification simulation, validation in many cases is done in MATLAB, and most of the simulation of the beginners are using Modelsim simulation software. For example, design a signal filter module, verify that the filter module is in MATLAB design verification, the module design parameters and design structure, and then converted to RTL code, and then with the Modelsim software simulation, the process involves the use of MATLAB software to produce the signal to be tested, Input into the RTL code, and then after the simulation through the Modelsim software to get the signal processed, then the signal output to a file, and finally through the MATLAB software analysis of the processing of the signal spectrum, to evaluate the filtering effect. After the verification evaluation test is complete, download the composite to the board. The process is as follows:

Hardware-in-loop (Hardware in the Loop, HIL) is a semi-real-time simulation technology to realize the real-time simulation of the whole system, which can quickly realize the verification and optimization of the design scheme, shorten the development cycle and reduce the development cost. Hil has been widely applied in aerospace, military, automotive and other fields.

???? Hardware in-loop is a quasi-physical (FPGA) real-time simulation (simulink) technology that enables the FPGA and simulink to be combined to communicate between the FPGA and the PC-side simulink via the physical connection between the PC and the FPGA, At present, the physical connection mode is Ethernet and Jtag two, in fact, the principle of this connection and Quartus II, similar to the Signaltap, are in the FPGA to generate the corresponding module, responsible for receiving and transmitting information data to complete the entire hardware in the loop communication process, If you've been exposed to SIGNALTAP before, it's relatively easy to understand.

???? Thus, what are the advantages of using hardware in the ring? The use of hardware in the ring can be omitted Modelsim this intermediate link, in a simple experiment, direct board-level verification, directly on the simulink to generate the signal to be tested, and then the signal to be tested, via Ethernet or JTAG interface to the FPGA, Then the FPGA processing (acquisition) signal is transmitted to simulink for analysis, thus speeding up the RTL design verification process.

???? At the same time, this method can also be applied to image/audio processing field, through FPGA acquisition image/audio signal, and then through the hardware in the loop back to the PC-side simulink (in this case, FPGA can be considered as a preprocessing board function), and then do processing and analysis at the Simulink end, This can reduce the cost of buying images or audio capture boards, and the PC-side simulink and FPGA together to form a real-time processing system, has great significance.

FPGA and Simulink combined real-time loop series-opening