FreeRTOS Interrupt configuration and Critical segment

Interrupt Screen Register
Primask, Faultmask and Basepri

1.PRIMASK: This is a register with only 1 bits. When it's 1 o'clock, it turns off all the masked anomalies, leaving only the NMI and hard fault to respond. Its default value is 0, indicating no interruption
2.FAULTMASK: This is a register with only 1 bits. When it is set 1 o'clock, only NMI can respond, and all other exceptions, including interrupts and fault, shut up. Its default value is also 0, indicating no exception
3.BASEPRI: This register has a maximum of 9 bits (determined by the number of digits that represent the priority). It defines the threshold value of the masked priority. When it is set to a value, all interrupts with a priority number greater than or equal to this value are closed (the higher the priority number, the lower the priority). However, if it is set to 0, no interrupts are turned off, and 0 is the default value

Law one: CM3 also specially set up a CPS directive

Cpsid I; primask=1; off interrupt
Cpsie I; primask=0; open interrupt
cpsid F; faultmask=1; off exception
Cpsie F; faultmask=0; open exception

Law II: Using the MRS/MSR directive

Mrs R0, Basepri   ; read Basepri to R0
Mrs R0, Faultmask; like on
Mrs R0, Primask   ;

MOVS R0, #1
MSR basep RI,   R0; R0 to Basepri
msr Faultmask, R0; like
msr Primask,   R0;

Critical Segment Code
Critical section codes are also called critical sections, which are sections of code that must be fully operational and cannot be interrupted, such as the initialization of some peripherals that require strict timing and cannot be interrupted during initialization.

Enter critical segment
#define TASKENTER_CRITICAL ()        portenter_critical ()//task-level critical segment Code Protection
#define Taskenter_critical_ FROM_ISR () Portset_interrupt_mask_from_isr ()

//exit critical segment
#define TASKEXIT_CRITICAL ()         portexit_critical () Interrupt-level critical section code protection
#define TASKEXIT_CRITICAL_FROM_ISR (x) PORTCLEAR_INTERRUPT_MASK_FROM_ISR (x)

#define PORTENTER_CRITICAL ()        vportentercritical ();
#define PORTEXIT_CRITICAL ()         vportexitcritical ();

void vportentercritical (void) {portdisable_interrupts ();

    uxcriticalnesting++; /* This isn't the interrupt safe version of the Enter critical function so assert () if it's being called from an int  Errupt context.  Only API functions this end in "Fromisr" can is used in an interrupt.  Only assert if the critical nesting count are 1 to protect against recursive calls if the Assert function also uses A critical section. */if (uxcriticalnesting = = 1) {Configassert (Portnvic_int_ctrl_reg & portvectactive_mask) = = 0)
    ;
    }} void Vportexitcritical (void) {Configassert (uxcriticalnesting);
    uxcriticalnesting--;
    if (uxcriticalnesting = = 0) {portenable_interrupts (); }
}