GCC gdb Makefile Learning Notes

First, GCC (GNU C compiler)
1. Preprocessing gcc-e aaa.c-o aaa.i→.i (C code)
↓
2. Compiling gcc-s aaa.i-o aaa.s→.s (assembly code)
↓
3. Assembly GCC-C Aaa.s-o AAA.O→.O (target code-binary)
↓
4. Link gcc aaa.o-o aaa→aaa (executable file)

Optimized compilation link gcc-o (O2/O3) AAA.O

Specify the Search directory
1. header file (default is/usr/include) gcc-i/home-c c1.c
2. library file (default is/usr/lib) gcc-l/home-c c1.c
3. Find the library file by name Gcc-lpthread-lcurses-c c1.c

Static library (. a)
Static link gcc-static hello.c-o Hello
Gcc-c ku.c
Ar-r ku.a KU.O
Gcc-c MAIN.C
GCC main.o-l. Ku.a-o Main
./main
RM ku.a

Dynamic libraries (. So)
Dynamic Link gcc hello.c-o hello
Gcc-c ku.c
gcc-shared KU.O ku.so
Gcc-c MAIN.C
GCC main.o-l. Ku.so-o Main
./main

Execution error, the library file could not be found:
A.CP ku.so/usr/lib Dynamic Library copied to/usr/lib

B. Modify the environment variable Ld_library_path
Export Ld_library_path= $LD _library_path:/home/lizhanglin/windows/csource/

Ii. gdb (GNU Debugger)
Powerful program Debugging tools under UNIX
1. Start the program
2. Set breakpoints to stop
3. You can check the variables in the program when you stop
4. Dynamically changing the environment of program operation

Gcc-g aaa.c-o AAA generates debug information
Common commands:
L: Output code and display line number
R: Direct run-point results
Break line number: Set Breakpoint (program runs to breakpoint stop)
P Variable Name: View the value of a variable
C: The program continues to run
Clear: Delete Breakpoints
N: Single-Step Debugging (does not enter function)
S: Single Step Debugging (Entry function)
Info Break View breakpoint Information
Delete Breakpoint Number Remove Breakpoint
Q Exiting the Debug program

Third, makefile

The makefile file is a rule file that defines all the source files in the compilation project

Makefile File structure
Goal: Reliance
Command (Must be tab in front of the command)

MKMAIN:MKMAIN.O MK1.O MK2.O
GCC mkmain.o mk1.o mk2.o-o mkmain
MKMAIN.O:MKMAIN.C Mk1.h Mk2.h
Gcc-c MKMAIN.C
mk1.o:mk1.c
Gcc-c mk1.c
Mk2.o:mk2.c
Gcc-c mk2.c

Make command automatically find makefile file compilation under Directory
Make-f Other file names

Special symbols used by makefile files
$^: Represents all dependencies
[email protected]: represents the target
$<: Represents the first dependency

MKMAIN:MKMAIN.O MK1.O MK2.O
GCC $^-o [email protected]
MKMAIN.O:MKMAIN.C Mk1.h Mk2.h
Gcc-c $<
mk1.o:mk1.c
Gcc-c $<
Mk2.o:mk2.c
Gcc-c $<

Pseudo target
Targets that have no dependencies on only the execution action command are pseudo-targets

Make pseudo target

MKMAIN:MKMAIN.O MK1.O MK2.O
GCC $^-o [email protected]
MKMAIN.O:MKMAIN.C Mk1.h Mk2.h
Gcc-c $<
mk1.o:mk1.c
Gcc-c $<
Mk2.o:mk2.c
Gcc-c $<
Clear
RM mk1.o MK2.O MKMAIN.O

CC for GCC aliases
MKMAIN:MKMAIN.O MK1.O MK2.O
CC $^-o [email protected]
MKMAIN.O:MKMAIN.C Mk1.h Mk2.h
Cc-c $<
mk1.o:mk1.c
Cc-c $<
Mk2.o:mk2.c
Cc-c $<
Clear
RM mk1.o MK2.O MKMAIN.O

Makefile Using variables
Variable name = value//declaration variable
$ (variable name)//Get Variable name value
OBJ=MKMAIN.O MK1.O MK2.O
ab=gcc
mkmain:$ (obj)
$ (AB) $ (obj)-O mkmain
MKMAIN.O:MKMAIN.C Mk1.h Mk2.h
$ (AB)-C MKMAIN.C
mk1.o:mk1.c
$ (AB)-C mk1.c
Mk2.o:mk2.c
$ (AB)-C mk2.c

Cancels the execution of the command echoing back to the screen
OBJ=MKMAIN.O MK1.O MK2.O
ab=gcc
mkmain:$ (obj)
@$ (AB) $ (obj)-O mkmain
MKMAIN.O:MKMAIN.C Mk1.h Mk2.h
@$ (AB)-C MKMAIN.C
mk1.o:mk1.c
@$ (AB)-C mk1.c
Mk2.o:mk2.c
@$ (AB)-C mk2.c