General method of chip startup debugging

Source: Internet
Author: User

After the chip sample stream comes back, all people are most concerned about whether the new functions are normal and whether the problems found in the old version are solved, this requires replacing the old chip in the verification system and re-running the system for verification. In the sample phase, various strange problems may occur due to the poor encapsulation and low yield rate. The chip verification system includes the chip verification board, new chip, boot firmware (BiOS), and operating system, therefore, you can perform one-by-one troubleshooting from hardware to software and from the bottom to the top layers.


Check static settings of the motherboard


The static settings of the motherboard here refer to the verification system's no-changing jump caps and dial switches before and after power-on. These settings are usually used to set the System Access frequency and access mode, the details are as follows:


Whether the power-on is successful: In not all cases, the accord is connected to the verification Board to ensure that the system will be able to power on. Consider the following three situations: AC power failure, power failure, failure to output the desired DC, DC in the poweroff status, or PSU firmware problems. These situations must be taken into account.


CPU frequency doubling factor: the CPU frequency doubling factor, which refers to the ratio of the actual CPU running frequency to the CPU baseline clock frequency. Any chip has the highest design frequency and minimum frequency. If the frequency is too high or too low, the CPU gets the finger and runs abnormally.


Memory multiplier: refers to the multiple of the memory running frequency to the memory benchmark clock frequency. If the frequency exceeds the design frequency, the internal initialization fails or the system is running.


Bus frequency doubling factor: refers to the multiples of the actual operating frequency of the External Bus (HT and PCIe) to the benchmark clock. If the configuration is incorrect, the initialization of the bus may fail.


Specify mode: SPI/LPC

At the beginning of CPU execution, some of the earliest commands were executed from flash. To improve the speed of finger fetch, many CPUs currently use commands from spiflash at the earliest, but some CPU still use the CPU from the lpcflash. Some motherboard, these are set through a jumper, so the idea is required during debugging: if it is from the SPI/lpcflash area, make sure that the flash chip of the corresponding model is placed in the correct flash location. Otherwise, the specified flash chip cannot be obtained.


BIOS chip:

The BIOS chip may fail to boot properly after the system is powered on due to a burning failure, a wrong position, or a binary firmware error.


If the above static check on the motherboard is normal, but the BIOS or system is still not able to start normally, you need to perform the following dynamic check:

Check the dynamic power-on status of the motherboard: You can use a multimeter to determine whether the CPU core voltage and IO voltage are within the rated range. If the CPU core voltage is 0, the system will naturally fail to take the finger normally, check whether the ac2dc power supply is normal and whether the motherboard is faulty.


Check whether the specified time sequence is correct:

In the earliest stage, whether it is from the lpcflash or spiflash, the CPU is actually executed according to the time sequence specified in the LPC and SPI protocol specifications. To eliminate timing problems, you can capture the corresponding clock signal through the oscilloscope and control the signal to analyze whether the waveform is a symbol timing requirement.


Observe whether the crystal oscillator of the CPU, memory, and bus reference clock starts to vibrate:

The crystal oscillator, as the benchmark clock, is the physical heartbeat of the entire system. If the crystal oscillator has poor contact with the motherboard or is not on the motherboard, or the crystal oscillator cannot generate a square wave of the rated frequency, the system startup exception will occur.


Check whether the finger can be retrieved

If the above check is successful but still cannot be executed, you need to check whether the CPU on the board is in close contact with the corresponding slot, and eliminate the possibility of defective CPU.


Once there are no problems with all the preceding checks, theoretically the CPU should be able to take the finger for execution. To better track the startup process and identify and analyze the symptoms and causes of startup failure in time, you need to initialize the serial port, seven-segment digital tube, or gpio/LED lamp in the BIOS as soon as possible, in addition, print the output of each important startup step in the bios, or click the LED light and display the agreed output in the 7-segment digital tube. Of course, if the system has BMC, you can also use BMC to read the current startup code.


In addition, if the system supports the ejtag tool, you can connect to the ejtag cable tool to track the PC running track in the startup phase. For example, in the MIPs system, the following different PC codes represent different startup stages:

Bfcxxxxxxx: The uncache execution phase from flash.

9 fcxxxxxxxx: indicates the cache execution stage starting from flash.

8002 xxxxxxx: Retrieving from memory refers to the pmon stage executed in cache Mode

802 XXXXXXXX: the kernel state phase in which the cache is executed from the memory


All in all, in the chip debugging process, we need to combine the knowledge of CPU, bios, and various bus protocols to understand the power-on and timing of the main board hardware, make full use of tools such as serial port, multimeter, oscilloscope, and ejtag to speed up the debugging process.


This article is from the "Storage Kitchen" blog, please be sure to keep this source http://xiamachao.blog.51cto.com/10580956/1773737

General method of chip startup debugging

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