Generation of cy7c131 busy signal line

When considering the read/write conflict of the dual-port RAM, we decided to use the busy signal line of the dual-port RAM cy7c131 to feedback the ft2232h MCU host bus.

When a single module of the dual-port RAM can read and write, busyl and busyr are both high levels. If a conflict occurs, a later request will become a low level.

At this time, there are two ideas.

(1) listen on the I/01 pin of the MCU host bus connected by the busy line

The I/01 pin of MCU host bus is described as follows:

Pin No.	Name	Type	Fast serial interface configuration description
46	I/O1	I/O	Mpsse mode instructions to set/clear or read the high byte of data can be used with this pin. in addition this pin has instructions which will make the Controller wait until it is high, or wait until it is low. this can be used to connect to an IRQ pin of a peripheral chip. the ft2232h will wait for the interrupt, and then read the device, and pass the answer back to the host PC. i/O1 must be held in input mode if this option is used. please refer to application noteAn_108For operation of these instructions.

The usage of this pin is described inAn_108Is described as follows:

5.2 wait on I/O high 0x88, This will cause the mpsse controller to wait until gpiol1 (JTAG) or I/O1 (CPU) is high. once it is detected as high, it will move on to process the next instruction. the only way out of this will be to disable the controller if the I/O line never goes high.

5.3 wait on I/O low 0x89, This will cause the Controller to wait until gpiol1 (JTAG) or I/O1 (CPU) is low. once it is detected as low, it will move on to process the next instruction. the only way out of this will be to disable the controller if the I/O line never goes low.

Ideas:

Because the busy output is high without conflict, you can set I/O1 to the wait on high state, when the level received by the I/O1 pin is high, the next command is executed (the read/write command can be set to the next command after the high level ). In this way, when a read/write conflict occurs, if we are set to the busy low level, that is, we are the side of the restrained read/write, then weProgramWe will wait for the other party to finish reading and writing, and reply our busy back to high-end computers for reading and writing. This prevents read/write conflicts.

(2) Use the busy signal to connect to the iordy pin to prolong the read/write time

Observe the read/write sequence of the MCU host bus emulation mode, as shown below:

It can be seen that when Div by 5 is in the on state, iordy has a great gap in the T5 cycle when it is low and high.

Therefore, the dual-port RAM busy can be used to connect the iordy pin of the MCU host bus.