Getting Started with FPGAs 1

Introduction to FPGA Introductory knowledge   

In recent years, due to the use of Field Programmable gate Array (FPGA) is very flexible, and can be unlimited programming, has been more and more electronic programmers love, many friends want to learn some of the FPGA primer to prepare for the industry, now on the FPGA introduction knowledge of books, forums, Tutorials are a variety of different types. The following author also through the search for some information on the introduction of FPGA for everyone to learn and reference.

The beginning of the FPGA is to start with the definition of FPGA, what is the FPGA, what is the role of these are basic needs to understand things. FPGA is a programmable device, the current Hardware description language (Verilog or VHDL) completed circuit design, can be simple synthesis and layout, fast burning to the FPGA test, is the modern IC design verification technology mainstream.

FPGA Getting started knowledge should also include the FPGA work principle, the basic characteristics of FPGA, FPGA chip structure and other basic knowledge, the following small series from the following aspects to the introduction of FPGA simple knowledge.

How FPGAs work

The FPGA incorporates a concept such as a logic unit array LCA, which includes a configurable logic module, CLB, output input module IOB, and internal wiring three parts. The FPGA uses a small lookup table (16x1ram) to implement the combinational logic , each lookup table connected to the input of a D trigger, the trigger to drive other logic circuits or drive I/O, This makes up the basic logic unit module which can realize the combinational logic function and can realize the sequential logic function, which is connected or connected to the I/O module by using metal wires. The logic of the FPGA is realized by loading programming data into the internal static storage unit, the value stored in the memory unit determines the logical function of the logical unit and the connection between the modules and the I/O, and ultimately determines the function that the FPGA can realize, when power-up, The FPGA chip reads the data in the EPROM into the on-chip programming ram, and after the configuration is completed, the FPGA enters the working state. After power-down, the FPGA reverts to white, and the internal logic disappears, so the FPGA can be reused. FPGA programming does not require a dedicated FPGA programmer, only with a common EPROM, prom programmer can be. When you need to modify the FPGA function, just change an eprom. In this way, the same piece of FPGA, different programming data, can produce different circuit functions. An FPGA is a program that is stored in the on-chip RAM to set its working state, so it is necessary to program the on-chip RAM when working. Users can use different programming modes depending on the configuration mode.

Basic features of FPGA

1) using FPGA design ASIC circuit (special integrated circuit), users do not need to film production, you can get a suitable chip.

2) FPGA can be used for other full-custom or semi-custom ASIC circuit test samples.

3) There are rich triggers and I/O pins inside the FPGA.

4) FPGA is one of the devices with the shortest design period, lowest development cost and least risk in ASIC circuit.

5) FPGA uses high-speed CMOS process, low power consumption, can be compatible with CMOS, TTL level.

It can be said that FPGA chip is one of the best choice to improve system integration degree and reliability in small batch system.

FPGA chip structure

The current mainstream FPGA is still based on lookup table technology, which is far beyond the basic performance of previous versions, and incorporates hard-core (ASIC-type) modules for common functions such as RAM, clock management, and DSP. FPGA chips are mainly composed of 7 parts: programmable input and output unit, basic programmable logic unit, complete clock management, embedded block RAM, rich cabling resources, embedded bottom function unit and embedded dedicated hardware module.

1. Programmable input/output unit (IOB)

The programmable input/output unit is referred to as the I/O unit , which is the interface part of the chip and the external circuit, and completes the driving and matching requirements of the input/output signals under different electrical characteristics. in order to facilitate the management and adaptation of a variety of electrical standards, FPGA IOB is divided into several groups (banks), each bank interface standard is determined by its interface voltage Vcco, a bank can have only one vcco, but different bank Vcco can be different. Only ports of the same electrical standard can be connected together, the same Vcco voltage is the basic condition of the interface standard.

I/O block internal structure diagram

Typical IOB internal structure

2. Configurable logic block (CLB)

CLB is the basic logical unit within the FPGA . The actual number and characteristics of CLB vary depending on the device, but each CLB contains a configurable switch matrix consisting of 4 or 6 inputs, some selector circuits (multiplexers, etc.) and triggers. The switch matrix is highly flexible and can be configured to handle combinatorial logic, shift registers, or RAM.

4. Embedded block Ram (BRAM)

Most FPGAs have embedded block RAM, which greatly expands the scope and flexibility of FPGA applications. block RAM can be configured as a common storage structure such as single-port RAM, dual-port RAM, content address memory (CAM), and FIFO . The cam memory has a comparative logic in each memory unit inside it, and the data written into the cam is compared to each of the internal data and returns the address of all the data that is the same as the port data, so it is widely used in the routed address switch. In addition to block RAM, the LUT in the FPGA can be flexibly configured into structures such as RAM, Rom, and FIFO. In practical applications, the number of block RAM inside the chip is also an important factor in the selection of chips.

5. Rich Cabling Resources

The cabling resource connects all the elements inside the FPGA, and the length and process of the wire determine the drive and transmission speed of the signal on the wire. The FPGA chip has a wealth of cabling resources, divided into 4 categories according to the process, length, width and distribution of different locations. The first category is the global cabling resources, for the chip internal global clock and global reset/set the wiring; the second is a long-term resource to complete the high-speed signal between the chip bank and the second global clock signal wiring; The third category is short-term resources, which are used to complete the logical interconnection and cabling between the basic logical units; The fourth category is distributed cabling resources for proprietary clocks, resets, and other control signal lines.

In practice, designers do not need to directly select the cabling resources, the layout of the router can automatically according to the Input Logical network table topology and constraints to select the routing resources to connect the module units. In essence, the use of cabling resources and design results have a close, direct relationship.

6. Bottom-embedded function unit

The embedded function module mainly refers to the DLL (Delay Locked loop), PLL (Phase Locked Loop), DSP and CPU and other soft processing cores. Now more and more rich embedded function unit, make monolithic FPGA become system level design tool, make it have the ability of hardware and software joint design, transition to SOC platform gradually.

DLLs and PLLs have similar capabilities to complete clock high-precision, low-jitter multiplier and crossover, and duty-ratio adjustment and shift-equal functionality.

7. Embedded dedicated Hard core

　　embedded dedicated hard core is relative to the underlying embedded soft core, refers to the FPGA processing power of the hard core, equivalent to the ASIC circuit. To improve FPGA performance, chip manufacturers have integrated a number of dedicated hard cores inside the chip. For example: In order to improve the multiplication speed of FPGA, the main FPGA is integrated with special multipliers, in order to apply the communication bus and interface standards, many high-end FPGA internal integrated serial and transceiver (SERDES), can achieve dozens of Gbps transceiver speed.

Conclusion

Understanding the basics of Field Programmable gate Arrays (FPGAs) is essential to developing and programming users. This article is mainly for the novice FPGA enthusiasts to the basic knowledge of FPGA simple summary, FPGA primer needs to understand the work principle of FPGA, basic features, as well as the composition of FPGA chip and functional modules and other aspects. I hope that by reading the author's introduction to this FPGA introductory article can be useful for you want to understand the FPGA.

Getting Started with FPGAs 1