Gpio Mode detailed

For push-pull output, open-drain output, multiplexed open-drain output, multiplexed push-pull output
And the difference between pull-in input, drop-down input, floating-space input, analog input
Recently, when looking at the data sheet, we found that there are 8 types of GPIO configurations in CORTEX-M3:
(1) Gpio_mode_ain analog input
(2) gpio_mode_in_floating floating Air input
(3) GPIO_MODE_IPD drop-down input
(4) Gpio_mode_ipu pull-up input
(5) Gpio_mode_out_od open-drain output
(6) GPIO_MODE_OUT_PP push-Pull output
(7) Gpio_mode_af_od multiplexed open-Drain output
(8) Gpio_mode_af_pp multiplexing push-pull output
For beginners who are just getting started, I think these concepts must be made clear, usually the most contact is the push-pull output,
Open-drain output, pull-up input these three kinds, but has not been summarized. So, here's a summary:
Push-Pull output: Can output high, low level, connect digital devices; Push-pull structure is generally referred to as two transistors respectively by two complementary signals
Control, always at the time of one transistor conduction and another cutoff. High and low levels are determined by the IC's power supply.
Deadline High and low levels are determined by the IC's power supply.
Push-pull circuit is two parameters of the same transistor or MOSFET, in a push-pull mode in the circuit, each responsible for positive and negative half-cycle of the wave
Amplification task, when the circuit works, two symmetrical power switch tube only one conduction at a time, so the conduction loss is small, high efficiency.
The output can either sink current to the load or pump current from the load. The push-pull output stage improves both the load capacity of the circuit and
Increase the switching speed.
Detailed Understanding:
As shown in the figure, the output stage of the push-pull amplifier has two "arms" (two sets of amplification elements), while the current of one "arm" increases, the other
The current of the "arm" is reduced, and the state of the two shifts. As for the load, it seems to be an "arm" in the push, an "arm" in
Pull and work together to complete the current output task. When the output is high, that is, the lower load gate input high-level, the output of the power
The flow will be the lower door from the power supply through the VT3 pull-out. In this way, the output high and low, VT3 and VT5 all the way will
Alternating operation, which reduces power consumption and increases the capacity of each tube. And because no matter where you go, the pipe on resistance
are very small, so that the RC constant is small and the transition is fast. Therefore, the push-pull output stage improves the load capacity of the circuit and
High switching speed.
Open-Drain output: The output is equivalent to a transistor collector. A pull-up resistor is required to obtain a high level state. Suitable for making current
The ability to absorb current is relatively strong (typically within 20ma).
The circuit of the open-drain form has several features:
1. Use the external circuit drive capability to reduce the internal drive of the IC. When the IC internal MOSFET is on, the drive current
is from the external VCC through R pull-up, MOSFET to GND. Only a very lower gate drive current is required inside the IC.
2. In general, the open-drain is used to connect different levels of the device, matching the level, because the open-drain pin is not connected to the external
Pull-up resistor, you can only output a low level, if you need to have the function of the output high level, you need to connect the pull-up resistor,
A good advantage is that the transmission level can be changed by changing the voltage of the pull-up power supply. For example, with a pull-up resistor, you can
Provides Ttl/cmos level output and so on. (The resistance of a pull-up resistor determines the speed at which the logic level transitions along.) The greater the Resistance,
The lower the power consumption, the more the load resistor is chosen to balance power and speed. ）
3. Open-drain provides flexible output, but it also has its weaknesses, which is the delay of the rising edge. Because
The rising edge is charged to the load by an external pull-up passive resistor, so when the resistor chooses the hour delay is small, but the power is large;
Time delay large power consumption is small. Therefore, if the delay is required, it is recommended to use a falling edge output.
4. You can connect multiple open-drain pins to a single line. With a pull-up resistor, without adding any device
Situation, the relationship between "and logic" is formed. This is also an i²c, SMBus and other bus to determine the principle of bus occupancy status. Add: What
Is "line and". ：
On a junction (line), connect a pull-up resistor to the power supply VCC or VDD and n NPN or NMOS transistor collector
Pole C or drain D, the emitter E or source S of these transistors are connected to the ground, as long as there is a transistor saturation, the junction
(line) is pulled to the ground level. Because these transistors have a base injection current (NPN) or gate Plus high level (NMOS), the Crystal
The body tube is saturated, so the relationship of these bases or gates to this node (line) is either non-nor logic. If this node is behind
Add an inverter, that is, or logic.
In fact, it can be simply understood as: when all the pins are connected together, an external pull-up resistor, if there is a pin output for the logic
Series 0, the equivalent of grounding, parallel with the circuit "equivalent to a short circuit of a wire", so the logic level of the external circuit is 0, only
There are all high-level, and the result is only logic 1.
With regard to push-pull output and open-drain output, a simple graph is used to summarize:
The left side of the graph is the push-pull output mode, where the comparator output is high and the PNP transistor cutoff
NPN transistor conduction, output level vs+; When the comparator output is low, the opposite is true, PNP transistor conduction, output
And the ground is connected, low level. The right side can be understood as the open-drain output form, need to pull up.
Float input: For floating empty input, has not found a very authoritative explanation, had to understand from the following diagram
As the float input is generally used for external key input, combined with the input part of the circuit, I understand that the float input state,
The level state of the IO is indeterminate and is determined entirely by the external input, and if the pin is dangling, the port is read
The level is not deterministic.
Pull-up input/drop-down input/analog input: These concepts are well understood and can be easily read literally.
Multiplexed open-Drain output, multiplexed push-pull output: Can be understood as the configuration of the GPIO port when it is used as a second function (i.e. not
Used for universal IO ports)

Final Summary of usage:
Select IO mode in STM32
(1) Float input _in_floating--float input, can do KEY recognition, RX1
(2) with pull-up input _ipu--io internal pull-up resistor input
(3) with pull-down input _ipd--io internal pull-down resistor input
(4) Analog input _ain--application ADC analog input, or low power Save power
(5) Open-drain output _out_od--io output 0 GND, IO Output 1, floating, requires an external pull-up resistor, in order to
achieve high output level. When the output is 1 o'clock, the status of the IO port is pulled high by the pull-up resistor, but because it is an open-drain output mode,
Such an IO port can also be changed from an external circuit to low or constant. Can read IO input level change, achieve C51 IO
bidirectional function
(6) Push-Pull output _out_pp--io output 0-GND, IO output 1-to VCC, read input value is unknown
(7) Multiplexing function push-pull output _ af_pp--on-chip peripheral function (I²c SCL,SDA)
(8) The open-drain output of the multiplexing function _af_od--on-chip peripheral functions (tx1,mosi,miso. SCK. SS)
STM32 Set instance:
(1) Analog i²c use open-drain output _out_od, connect the pull-up resistor, can correctly output 0 and 1, read the value First
Gpio_setbits (Gpiob, gpio_pin_0), pull up, and then To read the value of IO; use
Gpio_readinputdatabit (GPIOB,GPIO_PIN_0);
(2) If there is no pull-up resistor, the IO is high by default, and the IO value needs to be read, using the pull-up input _ipu and the
float Null input _in_floating and open-drain output _out_od;