Hardware Design of Four-channel Ultrasonic Flaw Detection card

Hardware Design of Four-channel Ultrasonic Flaw Detection card

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Source: Electronic Technology Application Author: Meng Linggang, Song guangde

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The overall structure of a four-channel Ultrasonic Flaw Detection card
Figure 1 shows the overall structure of the Four-channel Ultrasonic Flaw Detection card. It can be seen from the diagram that it is mainly composed of ultrasonic emission circuit, channel selection, amplification and filtering, data collection and compression, card microprocessor, USB interface and other parts.
The four channels adopt the time-sharing mode. When the four channels are used for time-sharing ultrasonic emission, the echo signal is amplified and filtered by band-pass after the channel selection and switch, and then A/D conversion is performed under the control of FPGA, the collected data is compressed in FPGA in real time and stored in FPGA's dual-port RAM. Then, the data is read by the microprocessor on the card. After the digital filter is performed again, the data is transmitted to the PC through the USB interface.

2. Ultrasonic emission Circuit
The four sets of Transmit circuits of the Four-channel Ultrasonic Flaw Detection card are identical and work in time-sharing mode. Generally, the four transmit circuits are set to work repeatedly, the repeat frequency and probe activation sequence are set by the user in the main interface parameter setting item of the microcomputer based on the specific conditions such as the thickness of the steel plate, and imported into the control system of the Ultrasonic Flaw Detection card upon initialization. The launch circuit is activated by FPGA. When the narrow pulse output by FPGA is added to a radio channel, the launch circuit starts to work. The ultrasonic emission circuit is mainly used to generate high-voltage and narrow-pulse signals (400 V). The high-voltage and narrow-pulse signals are loaded on the piezoelectric wafer of the ultrasonic probe to convert the electric energy into the acoustic energy (mechanical energy) and generate ultrasonic signals. The ultrasonic signal transmitting circuit 2 of a single channel is shown. ICL7667 is a two-channel single-Power FET driver that converts a weak TTL input signal to a high voltage/strong current output with a high conversion speed. The working principle of this circuit is: when no pulse is emitted, the high-voltage power supply uses R4 and R2 to charge C2, so that the voltage difference between the two ends reaches + 400 V. After the emission pulse arrives, the FET Q1 is turned on and C2 is discharged through Q1. Because the voltage at both ends of the capacitor cannot change suddenly, the output potential of D2 is about-400 V in an instant. This negative pulse acts on the ultrasonic probe to generate piezoelectric transformation and launch the ultrasonic wave.

3. Select an echo Channel
Because only one (or only one) echo signal can be selected at the same time, the MAX4141 chip is used to select the echo signal. MAX4141 is a wide-band (330 MHz, 700 V/μs), four-choice multi-path distributor chip with buffer amplifier manufactured by MAXIM, it not only has a very fast switching rate, but also has a high input and low output impedance, so that the echo signal can be fully loaded to the next level of programmable gain amplifier. The echo signal is shown in circuit 3. Siganl In0 ~ The Siganl In3 corresponds to the echo signals of the four-way probe respectively, and the Signal Out is the echo Signal after buffer driving and Impedance Transformation. The P0 port of the single-chip microcomputer provides two signal lines for the MAX4141 channel selection. Table 1 shows the specific work conditions.

4 high frequency amplifier circuit
The echo signal is usually relatively weak, so the high-frequency amplification circuit is used to enlarge the echo signal. Because the test objects (steel plate thickness) are different, the echo signal strength is also unstable. Therefore, when designing a high-frequency amplification circuit, we design it into a program-controlled amplification circuit that can dynamically control the benefit value, the gain is dynamically controlled by MCU. In the design of the gain amplification circuit, the variable gain and low noise operation amplifier AD603 are selected to realize the linear gain in the form of dB, and the voltage per volt can increase by 40 dB. The gain range can be selected through different connections to its pins, namely-11dB ~ + 31dB (bandwidth 90 MHz) and 0dB ~ + 40dB (bandwidth 30 MHz ). In the design, two AD603 chips are used to form a programmable gain amplification circuit through cascade. The first level is set to-10dB ~ + The gain range of 30dB. The second level is set to 0dB ~ + 40 dB gain range. Two levels adopt the AC coupling mode, so as to avoid the drift of the front-Level DC voltage from the back-level amplification and then drown out useful echo signals. The Gain Control Voltage (Gain Control Voltage) is controlled by the output of the D/A converter. As shown in circuit connection 4 in this design, the gain range of the circuit is-10dB ~ + 70dB, which can fully meet the design requirements for thick steel plate flaw detection. In the figure, VREF is the output after the internal reference voltage of the D/A converter is doubled. The value is 2.4 V. Because the voltage gain control end of AD603 is sensitive to small voltage changes, therefore, the filter capacitor is added at each level in the circuit design to overcome the impact of Interference Signals on voltage gain.
5 band-pass filter circuit
A band-pass filter circuit is used to filter out the noise introduced during echo signal amplification. Because the ultrasonic flaw detection card has four channels, the ultrasonic probes used in each channel are not necessarily the same, and different ultrasonic probes can be replaced in the same channel, therefore, the filtering effect of only one filter circuit is not very good. Because of the wide Emission frequency range of the ultrasonic probe, it is generally in the range of kHz ~ In this study, two band-pass filter circuits are designed, with the bandwidth ranges of kHz to MHz ~ 2.5MHz and 2.5MHz ~ 10 MHz, which can be selected by a single-chip microcomputer through a drive relay, as shown in circuit 5.

6 FPGA function design
FPGA is the core component used in the detection system for digital signal processing. With its user programmable characteristics and high internal clock frequency, a data processing chip dedicated to ultrasonic testing is designed, this greatly improves the detection speed of the entire detection system. FPGA plays a very important role in the system. Some data signal processing is done through it. Its internal function Diagram 6 shows. It can be seen that FPGA is mainly composed of Narrow Pulse Generation sampling delay module, parameter register module, data collection compression module, dual-port RAM module, and automatic defect judgment module. For detailed working principles, see [3].

7. Microprocessor and USB Interface
The work of the entire board is controlled by the microprocessor (MCU. In this design, the upper-right PC transmits the control parameters to the MCU, including the delay parameter, benefit value, damage determination DAC curve, filter selection, etc, the MCU then transmits these parameters to FPGA and gain controller (D/A converter) to implement board control. In addition, the MCU performs digital filtering on FPGA data to improve the signal-to-noise ratio.
The data transmission between MCU and the upper PC is implemented through the USB interface. The PDIUSBD12 chip of PHILIPS is used in the design, which is cost-effective, stable and reliable, the Ultrasonic Echo Signal is finally transmitted to the upper PC for display and Defect Analysis.
This paper introduces a hardware design method for a four-channel Ultrasonic Flaw Detection card for ultrasonic non-destructive testing, and develops an FPGA chip for Echo Signal Processing and automatic defect judgment, which greatly improves the detection speed. The Board can be flexibly used to build a variety of multi-channel ultrasonic flaw detection equipment.
References
1 Xilinx. The Programmable Logic Data Book. 1999,200 0
2 Carter. j w. Digital Designing with programmable logic devices. NJ: Prentice Hall, 1997
3 Li x, Dong JW, Yu XY et al. Measuring System of the level of Oilcan based on balance principle. 2nd International Symposium on Instrumentation Science and Technology, 2002.8, Jinan, China