Hardware initialization, NAND flash curing operation, simple system start-up process

2015.3.27
Friday Sunny

Link scripts define the emission order of the Code

Hardware system initialization:
One: Arm core initialization: (there is an instruction) to initialize the arm core when you need to look at the arm core manual instructions:
1. Anomaly vectors (at least one reset exception, initialization mode-SVC)

Ldr R0, =_start
MCR P15, 0, R0, C12, C0, 0

2. Processor Mode-svc
3. Turn off interrupts

Mrsr0, CPSR
BICR0, R0, #0x1f
Orrr0, R0, #0xd3 @1101 0011//Close Irq,fiq and set Svc
Msrcpsr,r0

4. Initializing the stack (not necessarily initializing the heap), initialization is important, and it is easy to stack overflow

Ldr sp, =0x30000000

5. Initialize coprocessor D-cache I-cache (usually turn them off)
6. Clear BSS (uninitialized global or static variable, or global variable initialized to 0)
Below is the clear BSS section and the illuminated three small lights:

CLEAR_BSS:
mov R2, #0
Ldr R0, =_bss_start
LDR R1, =_bss_end
Bss_loop:
CMP R0, R1
Strneb R2, [r0], #1
BNE Bss_loop

Ldr R0, =0XE03001C4
LDR R1, =0x7
STR R1, [R0]

Second: Core Peripheral initialization:
1. Guan (the default watchdog is on), write the lowest bit 0 on the line
@ Off the Dog
Ldrr0, =s5pc100_watchdog_base@0xea200000
STRR5, [R0]


2 clock
@ Initialize the clock system
Blsystem_clock_init

3.DRAM
4.NAND

@ Initialize NAND controller
Blnand_asm_init

@ Initialize Memory controller
Blmem_ctrl_asm_init

Third: The peripherals that need to be used
1.UART
2.NET
3.LCD
4.USB
....................

The procedure for lighting the lamp, where the test procedure went.

Program jump before saving the address of LR, after entering the program, because the program inside may happen again jump, so in the entry program
The beginning of the place saves the address with a register that is not used in the program to prevent the LR from being flushed out

MRC Write co-processor
The MCR reads the coprocessor back to the front
MCR P15, 0,r0,c12,c0,0

The Development board through the serial port and the host connection, the code operation situation displays in the terminal, through the network cable to download the TFTP inside the file, when the development board inside Kernel launches, the Development Board will host NFS inside the
The file system maps to its own memory and runs

Print Bootcmd
Bootcmd=tftp 20008000 Zimage;go 20008000

Set the environment variables above:
setenv bootcmd tftp 20008000 zimage\;go 20008000

One: The curing operation of NAND flash: Erase and write:
1.tftp 20008000 Zimage
2.nand Erase 100000 300000
3,nand Write 20008000 100000 300000 writes from memory 20008000 to NAND flash in 100000, the write size is 300000
has been written into NAND flash, turn off the power to run try
Test: NAND read 20008000 100000 30000 from NAND flash address 100000 read 300000-size program to memory 20008000

Two: Also say file system curing to NAND Flash: ROOTFS.CRAMFS
TFTP 20008000 Rootfs.cramfs
NAND Erase 400000 400000
NAND write 20008000 400000 400000

Three: Set the NAND flash to start, modify the Bootcmd
SETENV bootcmd NAND read 20008000 100000 300000\;go 20008000
Run Bootcmd

Four: Modify the loaded file system path
setenv Bootargs root=/dev/mtdblock2 ip=192.168.1.200 INIT=/LINUXRC console=ttysac0,115200//IP Here is the IP of the Development Board

Want to really run on the board is the core and files that are cured in the board, but also need to modify: (A simple way to see if it is running the board inside the cured program: in the host
Add and remove directories to see if there are any updates on the board terminal.

Reset, check it out.

Specific actual operation:

Command copy:

FSC100 # TFTP 20008000 zimage
Using dm9000 Device
TFTP from server 192.168.1.139; Our IP address is 192.168.1.200
Filename ' Zimage '.
Load address:0x20008000
Loading: #################################################################
#################################################################
##
Done
Bytes transferred = 1932932 (1d7e84 hex)
FSC100 # NAND Erase 1000000 300000

NAND erase:device 0 Offset 0x1000000, size 0x300000
Erasing at 0x12e0000 – 100% complete.
Ok
FSC100 # NAND Write 20008000 100000 300000

NAND write:device 0 Offset 0x100000, size 0x300000
3145728 bytes Written:ok
FSC100 # TFTP 20008000 Rootfs.cramfs
Using dm9000 Device
TFTP from server 192.168.1.139; Our IP address is 192.168.1.200
Filename ' Rootfs.cramfs '.
Load address:0x20008000
Loading:timehandler
T #################################################################
#################################################################
#################################################################
#######################################
Done
Bytes transferred = 3424256 (344000 hex)
FSC100 # NAND Erase 400000 400000

NAND erase:device 0 Offset 0x400000, size 0x400000
Erasing at 0x7e0000 – 100% complete.
Ok
FSC100 # NAND Write 20008000 400000 400000

NAND write:device 0 Offset 0x400000, size 0x400000
4194304 bytes Written:ok
FSC100 # Print Bootargs
Bootargs=root=/dev/mtdblock2 ip=192.168.1.200 INIT=/LINUXRC console=ttysac0,115200
FSC100 # Print Bootcmd
Bootcmd=nand Read 20008000 100000 300000;go 20008000
FSC100 #

Find the SOC deployment space in the Memery address map of the SOC manual

DRAM and SRAM differences, class-checking
System of memory and peripherals are unified address, all in the system's 4G space inside

System boot:

When the system executes, it starts from the mapped 0 address, in s5pc100 is BL0, in the BL0 to determine where the system is started (this can also be set by the dial switch),
For example, NAND flash, if it is NAND flash, then BL0 will BL1 in the NAND flash 16k content moved to the SRAM 96k space-specific address (such as 0x3400),
Then run (not all the content, then what to do with the rest of the content??? ), before this BL0 will initialize something, such as a stack, in NAND flash
The rest of the program, BL1 to move the code into DRAM by self-removal.

Address-independent jump directives: relative addressing
But: Ldr pc, =start is address-related, understand

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Hardware initialization, NAND flash curing operation, simple system start-up process