High Speed uarts

In Io multiplexing, uart1/2/7 is a high-speed serial port among the 7 serial ports of the lpc3250. Io multiplexing can be seen in the Serial Port IO multiplexing of lpc3250. Description: enable the lpc32xx high speed serial ports in the kernel driver configuration and selectwhich High Speed Serial Ports of the 3 you want to use in the Linux Kernel configurationsystem type --> menu. add the device nodes to the/dev are using the following command: [root @ NXP/root] # mknod/dev/ttytx0 C 204 196 [root @ NXP/root] # mknod/dev/ttytx1 C 204 197 [root @ NXP/root] # mknod/dev/ttytx2 C 204 198 has been based on the documentation to enable high-speed serial port: # High Speed uarts # config_mach_lpc32xx_hsuart?enable = yconfig_mach_lpc32xx_hsuart2_enable = Enabled = Y. However, the system startup information does not, after you create a device node by running the mknod command, send the following characters to the node: [root @ NXP root] # mknod/dev/ttytx0 C 204 196 [root @ NXP root] # echo Hello>/dev/ttyTX0-sh:/dev/ttytx0: no such device or address can be sent to a common serial port: [root @ NXP root] # echo Hello>/dev/ttys1 [root @ NXP Root] # echo Hello>/dev/ttys2 [root @ NXP root] # echo Hello>/dev/ttys3 [root @ NXP root] # echo Hello>/dev/ttys0hello [root @ NXP root] # solve the problem of the serial port originally driven by the device, in the non-standard serial port section, configure the high-speed serial port of lpc32xx. <*> Lpc32xx high serial port support Kernel configuration file: # Non-8250 serial port support # config_serial_amba_pl010 is not set # restart is not setconfig_serial_hs_lpc32xx = y startup information: clcd: phytec LCD hardware, qvga portrait displayconsole: switching to color frame buffer device 30x40serial: 8250/16550 driver4 ports, IRQ sharing disabledserial8250.0: ttys0 at mmio 0x40090000 (IRQ = 9) is a 16550aco Nsole [ttys0] enabledserial8250.0: ttys1 at mmio 0x40080000 (IRQ = 7) is a 16550aserial8250. 0: ttys2 at mmio 0x40088000 (IRQ = 8) is a 16550aserial8250. 0: ttys3 at mmio 0x40098000 (IRQ = 10) is a 16550alpc32xx_hsuart.0: ttytx0 at mmio 0x40014000 (IRQ = 26) is a lpc32xx_hsuartlpc32xx_hsuart.0: ttytx1 at mmio 0x40018000 (IRQ = 25) is a lpc32xx_hsuartlpc32xx_hsuart.0: ttytx2 at mmio 0x4001c000 (IRQ = 24) is a lpc32xx_hsuartloop: module loadedlpc32xx_mii_bus: After using udev, you do not need to manually create a device node. ttytx0 ~ is already in the/dev/directory ~ 2 nodes. Send the character again. It is normal: [root @ NXP root] # ls/dev/ttytx */dev/ttytx0/dev/ttytx1/dev/ttytx2 [root @ NXP root] # echo Hello>/dev/ttytx0 [root @ NXP root] # echo Hello>/dev/ttytx1 [root @ NXP root] # echo Hello>/dev/ttytx2 [root @ NXP root] # To make it more convenient and practical, it is best to modify the Kernel configuration file. In the selected region, select config_serial_hs_lpc32xx to ensure full use of the high-speed serial port. I/O multiplexing has not been configured in actual tests. The high-speed serial port test is as follows: ttytx0 -- uart1, which can receive ttytx1 -- uart2, and ttytx2 -- uart7, which cannot receive or send new versions, the high-speed serial port of the new chip cannot be used, and the chip cannot be sent or received, and the pin has no signal. Later reset the uart_loop, prohibit all serial loopback function, pin signal: file: ARCH/ARM/mach-lpc32xx/board-smartarm3250.c601/abing602 _ raw_writel (0, io_p2v (0x40054008); // turn off all UART's loopback but the baud rate is incorrect. The program is set to 115200. The PC must use 128000 to receive the data correctly. Fixed the baud rate problem. A Bug was found in the drivers/serial/hs_serial_lpc32xx.c file, which was corrected as follows, with a comment of 73 ~ Code 76: 70/* find the closest divider to get the desired clock rate */71 DIV = uartclk/rate; 72 hsu_rate = (DIV/14)-1; 73 // If (hsu_rate! = 0) 74 // {75 // hsu_rate --; 76 //}