- To ensure thread safety, to ensure efficient.
- This is a work related to the chip architecture and compiler.
- Profiling boost::d Etail::shared_ptr's counting implementation mechanism:
the reference count member property in//shared_ptr PNBoost::d etail::shared_count pn;//reference counterPI member properties in//Shared_countSp_counted_base * PI_;Use_count_ member property in//Sp_counted_base (take W32 implementation as an example)LongUse_count_;//#shared///Add or subtract reference count W32 platform specific implementationBOOLAdd_ref_lock ()//True on success{ for( ;; ) {LongTMP =static_cast<Long Const volatile& > (USE_COUNT_);if(TMP = =0)return false;#if defined (boost_msvc) && boost_workaround (boost_msvc, = =) //work around a code generation bug LongTMP2 = tmp +1;if(Boost_sp_interlocked_compare_exchange (&use_count_, TMP2, tmp) = = TMP2-1)return true;#else if(Boost_sp_interlocked_compare_exchange (&USE_COUNT_, tmp +1, tmp) = = tmp)return true;#endif} }voidRelease ()//Nothrow{if(Boost_sp_interlocked_decrement (&use_count_) = =0) {Dispose (); Weak_release (); } }//There is also a thread-safe self-increment that is implemented directly with the assembler, such as implementation under the MIPS architecture related to the GCC compilerinline voidAtomic_increment (int* PW) {//++*PW; inttmp __asm__ __volatile__ ("0:\n\t" ". Set push\n\t" ". Set mips2\n\t" "ll%0,%1\n\t" "Addiu%0, 1\n\t" "SC%0,%1\n\t" ". Set pop\n\t" "Beqz%0, 0b":"=&r"(TMP),"=m"(*PW):"M"(*PW));}inline intAtomic_decrement (int* PW) {//return--*PW; intRV, tmp; __asm__ __volatile__ ("0:\n\t" ". Set push\n\t" ". Set mips2\n\t" "ll%1,%2\n\t" "Addiu%0,%1, -1\n\t" "SC%0,%2\n\t" ". Set pop\n\t" "Beqz%0, 0b\n\t" "Addiu%0,%1,-1":"=&r"(RV),"=&r"(TMP),"=m"(*PW):"M"(*PW):"Memory");returnRV;}
Created with Rapha?l 2.1.0 shared_ptr Shared_count Sp_counted_base each platform implementation End
In fact, implementing a cross-platform reference count is quite difficult, but boost does.
The list of compiler-chip architecture platforms is as follows,
The latter part of the sp_counted_base_ is the compiler-chip architecture. For example, Sp_counted_base_acc_ia64 is the CPU chip architecture of the ACC compiler's IA64.
Why is it related to both the compiler and the chip architecture? Because the code is eventually converted to binary code through the compiler, and if the compiler for different chip architectures, does not implement a unified API interface, it needs to be related to the chip architecture.
W32 and Clang do not have the same chip architecture as the suffix, meaning that they all implement the unified underlying API under various architectures.
How do I implement a reference count?