How flash is stored

I suddenly saw a good article about nor and NAND written by someone on the internet two years ago. As a legal citizen of csdn, it is necessary

I. Principles of data storage

Both types of flash memory use three-end devices as the storage unit, which are the source pole, drain pole, and gate. They work in the same way as those of the Fet, the main purpose is to use the effect of the electric field to control the switching between the source pole and the drain pole. The current consumption of the gate is extremely small. The difference is that the FET is a single-gate structure, while Flash is a dual-gate structure, A floating gate is added between the gate and the silicon substrate.

 

The floating gate is composed of nitrogen compounds clamped between two layers of silica. The nitrogen compounds in the middle are charge traps that can store charges. The thickness of the upper and lower layers of oxides is greater than 50, to avoid breakdown.

Ii. replaying power of float

The process of writing data to a data unit is the process of injecting charge into the charge trap. There are two technologies for writing data, hot electron injection (hot electron injection) and the F-N tunneling effect (Fowler nordheim tunneling), the former is through the source pole to the floating gate charging, the latter is through the silicon base layer to the floating gate charging. Nor flash uses hot electronic injection to charge the float gate, while NAND uses the F-N tunnel effect to charge the float gate.

Before writing new data, you must first erase the original data, this is different from the hard disk, that is, the floating gate of the charge, the two flash is through the F-N tunnel effect discharge.

 

Writing and erasure of NAND Flash

 

Nor flash write and erase

 

3. 0 and 1

In this regard, the two flash formats are the same. Injecting a charge into the floating gate indicates that '0' is written, and no injection charge indicates '1'. Therefore, 1 is written for clearing flash data, this is the opposite of the hard disk;

For the unit with charge in the float gate, due to the induction of the float gate, a space charge zone with positive voltage will be formed between the source pole and the drain pole. At this time, no matter whether there is any bias voltage applied on the control pole, all transistors will be turned on. For a transistor without charge in a float gate, only when a proper bias voltage is applied to the control pole, the charge is induced at the silicon base layer, and the source pole and the drain pole can be turned on, that is to say, when no bias voltage is applied to the control pole, the transistor ends.

If the source pole of the transistor is grounded and the pole is missed, the data in the storage unit can be obtained by detecting the conduction state of the transistor without bias voltage, if the level of the bit line is low, it indicates that the transistor is in the conduction state, the data read is 0, and if the bit line is high, it indicates that the transistor is in the cutoff state, and the data read is 1. Because the voltage applied to the control gate during Data Reading is small or no voltage is applied at all, it is not enough to change the original charge volume in the floating gate. Therefore, the read operation will not change the original data in flash.

Iv. Connection and addressing methods

The two flash systems share the same storage unit and work in the same way. To shorten the access time, they do not perform separate access operations on each unit, but perform collective operations on a certain number of access units, the storage units of NAND Flash are connected in series, while those of nor Flash are connected in parallel. to effectively manage all the storage units, the storage units must be centrally configured.

All the storage units of NAND are divided into several blocks, each of which is divided into several pages. Each page is 512 bytes, that is, 512 8 digits, that is, each page has 512 lines, each location has eight storage units. The data stored on each page is exactly the same as that stored on one sector of the hard disk, this is specially designed to facilitate data exchange with the disk, so the block is similar to the hard disk cluster; the size is different, the number of blocks is different, and the number of pages of the blocks is also different. When reading data, when a transistor is locked by a line or bit, the control pole of the transistor is not subject to the offset voltage, and the other seven are turned on with the offset voltage, if there is a charge in the floating gate of this transistor, it will turn on to make the bit line low, the number of reads is 0, and the opposite is 1.

Each storage unit of nor is connected to a location line in parallel to facilitate Random Access to each bit. With a dedicated address line, it can achieve one-time direct addressing; this shortens the execution time of Flash processor commands.

 

V. Performance 1. Speed
When writing and erasing data, Nand supports the entire write/erase operation, so the speed is much faster than nor, and the difference between the two is nearly a thousand times. When reading data, since NAND can read and write data only after it sends address information to the chip for addressing, its address information includes the block number, the in-block page number, and the in-page byte number, select the sequence to locate the bytes to be operated. In this way, each data access request must go through three addressing steps, with at least three clock cycles; nor flash directly reads data in units of words or bytes. Therefore, nor has obvious advantages when reading data. 2. Capacity and cost
Each storage unit of nor flash is connected to the bit line, increasing the number of bit lines in the chip, which is not conducive to the increase of storage density. Therefore, in the same area and process, the capacity of NAND Flash is much larger than that of nor, and the production cost is lower, making it easier to produce large-capacity chips. 3. ease of use
The I/O Ports of NAND Flash use reusable data lines and address lines. Data Access must be carried out in a serial manner through registers. Different products or vendors have different definitions of signals, it makes the application more difficult. Nor Flash has a dedicated address pin for addressing, which is easy to connect to other chips. In addition, it also supports local execution, and applications can run directly inside Flash, product design can be simplified. 4. Reliability
The adjacent elements of NAND Flash are prone to bitwise flip, resulting in random distribution of Bad blocks. If you want to eliminate bad blocks during the production process, the yield rate will be too low and the cost-effectiveness will be poor, therefore, before leaving the factory, it is necessary to detect Bad blocks generated during the production process under high temperature and high pressure conditions, and write bad block tags to prevent data from being written to Bad blocks during use; however, new bad blocks are inevitable during use. Therefore, EDC/ECC (error detection/error correction) and BBM (Bad block management) must be used) and other software measures to ensure data reliability. The bad block management software can discover and replace a failed block for reading and writing, and copy data to a valid block. 5. Durability
Flash may cause oxidation and degradation of the media during data writing and erasure, resulting in aging of the chip. Nor is especially suitable in this aspect. Therefore, it is not suitable for frequent disk writes. The number of disk writes is 1 million, nor only has 0.1 million times.