How NAND flash starts

Note: This article is taken by Hu Hao's colleagues.

Most of the arm9-cpus have an internal SRAM, which is short for static RAM. It is a memory with static access function, you can save the data stored internally without refresh the circuit. In this way, it can be used directly without initialization. The external extended large-capacity SDRAM is different, and the external large-capacity SDRAM needs to be initialized before it can be used. This is true for the processors I have transplanted: S3C2410 (ARM920T), S3C2440 (ARM920T), at91rm9200 (ARM920T), and at91sam9260 (arm926t. On the S3C2440 CPU, the SRAM size is 4 kb. In datasheet, it is called stepping stone ".

Nandflash and norflash are different: norflash is directly attached to the system bus like memory, so there are enough address lines so that the CPU can address each storage unit, this also means that the CPU can directly access the content stored in norflash through the bus. At the same time, it also supports xip (that is, on-chip execution without moving the code to the memory, can be run directly on norflash ). Nandflash does not directly mount the system bus, but uses the nandflash controller (which is generally integrated into the CPU) to complete read and write operations. If we call the norflash addressing method direct addressing (instead of the direct addressing method in the Assembly, this means that the CPU can directly access the storage unit through the address line ), the nandflash here is indirect addressing (nandflash controller is needed here ). So we are using Nand
Before flash, you must initialize the NAND flash controller.

After understanding the above, it is not difficult to understand why the system can be started directly from norflash, rather than from nandflash. This is because, when the arm cpu is reset, the CPU will go to the 0x0000 0000 address by default to get the command, and if we start from norflash (generally norflash will be mounted to bank0, ngcs0), The S3C2440 CPU will mount the norflash space to the memory space of 0x0000 0000. Then the CPU can directly run the command from norflash and start it. If it is nandflash, because Nand
Flash cannot be directly mounted to the system bus, and its read/write operations and erasure operations must depend on the NAND flash controller, this means that the storage space of NAND flash can never be mapped to the address 0x0000. In addition, the read/write operations of NAND Flash are not directly addressable. If you are interested, you can check nandflash Datasheet and write a raw NAND Flash erasure. Then the read/write operation program will understand it. I have written such a program, which is very helpful for understanding how nandflash operates.

What should I do if these CPUs are to be started from NAND Flash? This will use the internal SRAM of the cpu I mentioned earlier. As mentioned in Datasheet of S3C2440, If we configure to start from NAND Flash, the CPU will automatically map the internal SRAM address to the address space 0x0000, if it is not started from NAND Flash, the devices mounted to bank0 (ngcs0) will be mapped to 0x0000 0000 address space, as we mentioned earlier.

So if we start from the SRAM, where will the commands (that is, the Code) in the SRAM come from? When the power-on of the S3C2440 processor (both ARM920T and arm926t cores should be the same, and I think the same is true for the other 10), the CPU automatically sends the nandflash first 4 K code (or command) copy to the internal SRAM, which is automatically completed by the CPU and does not require our intervention. This means that the content in the SRAM is the code of the nandflash 4 K.

In this way, in our bootloader such as U-boot, we need to ensure that the first 4 K code we compiled completes the following functions:

1. initialize basic functions such as CPU, external SDRAM, and nandflash controller;

2. Copy the remaining U-boot code from nandflash to the external SDRAM.

3. Tune it to the external SDRAM to run the U-boot code. In this way, U-boot starts.

Attach several common compilation keywords

. Text: code segment. (Command sequence, generally read-only)
. Rodata: read-only data segment. (Like const in C, it is a constant)

. Data: Data Segment with an initial value. (Define a "global variable" in the C language and assign the initial value to it, it will be saved to this segment)

. BSS: data segment without an initial value. (No "global variable" with an initial value assigned ")