How is the backplane bandwidth, switching capacity, and packet forwarding rate of the switch calculated? Why each manufacturer's target is higher than the line speed forwarding

Source: Internet
Author: User
Tags cisco 2960x

For example, Cisco 2960X-24ps-l (24 Gigabit Ethernet port 4 Gigabit optical port), forwarding bandwidth 108Gbps, switching bandwidth 216Gbps, packet forwarding rate 71.4Mpps, according to non-blocking line rate forwarding, the switching capacity is 2*28* 1Gbps = 56Gbps, the nominal 216Gbps is much higher than this, why? Is it due to the different design of the switch matrix? How is his 216Gbps calculated? For example: its packet forwarding rate is: 28*1.488Mpps=41.664Mpps<71.4Mpps, the cisco2960 series old model switch can't reach 42Mpps, it can't reach the line speed forwarding. This is fine. Now it’s 71.4Mpps, why is it so high? How to achieve, more than 42Mpps, does it make sense?

This question has not been resolved, who will answer, the following is a reference.


Switch backplane bandwidth, switching capacity, packet forwarding rate difference Backplane bandwidth refers to the entire switching capacity of the backplane, switching capacity refers to the switching capacity of the CPU, and packet forwarding refers to the capacity of the three-layer forwarding.

First, the backplane bandwidth

1. Switch backplane bandwidth meaning
   The backplane bandwidth of the switch, also called the backplane capacity, is the maximum amount of data that can be handled between the switch interface processor or the interface card and the data bus. The backplane bandwidth marks the total data exchange capacity of the switch, in Gbps. The backplane bandwidth of a typical switch ranges from a few Gbps to hundreds of Gbps. The higher the backplane bandwidth of a switch, the better the ability to process data, but at the same time the design cost will be higher.

2. The internal structure of the switch
  The utilization of backplane bandwidth resources is closely related to the internal structure of the switch. At present, the internal structure of the switch mainly has the following types: First, a shared memory structure, which relies on a central switching engine to provide a high-performance connection for a full port, and the core engine checks each input packet to determine a route. This method requires a large memory bandwidth and high management cost. Especially with the increase of the switch port, the price of the central memory will be very high, so the switch core becomes the bottleneck of performance realization; the second is the cross bus structure, which can Establish a direct point-to-point connection between ports, which is good for single-point transmission, but not suitable for multi-point transmission; the third is a hybrid cross-bus structure, which is a hybrid cross-bus implementation. Its design idea is to integrate The cross bus matrix is divided into small cross matrices connected by a high performance bus. The advantage is that the number of cross-buses is reduced, the cost is reduced, and bus contention is reduced; however, the bus connecting the cross-matrix becomes a new performance bottleneck.

3. Linear non-blocking transmission
    The best performance we can buy for the transfer machine is to require linear non-blocking transmission. How do we investigate whether the backplane bandwidth of a switch is sufficient? How to determine whether the design of the switch you bought is reasonable, and there is a blocking structure design?
  Calculation formula:
A. The sum of the number of all port capacity X ports should be less than the backplane bandwidth, which can realize full-duplex non-blocking switching, which proves that the switch has the conditions of maximizing data exchange performance.
B. Full configuration throughput (Mbps) = full configuration GE port number × 1.488 Mpps, wherein the theoretical throughput of a Gigabit port with a packet length of 64 bytes is 1.488 Mpps. For example, a switch with up to 64 Gigabit ports should have a full configuration throughput of 64 x 1.488 Mpps = 95.2 Mpps to ensure non-blocking packet switching when all port line speeds are working. Example: If a switch can provide up to 176 Gigabit ports and the declared throughput is less than 261.8 Mpps (176 x 1.488 Mpps = 261.8), then the user has reason to believe that the switch is designed with a blocking structure. * For 10 Gigabit Ethernet, the packet forwarding rate of a wire-speed port is 14.88 Mpps. * For Gigabit Ethernet, the packet forwarding rate of a wire-speed port is 1.488 Mpps. * For Fast Ethernet, the packet forwarding rate of a wire-speed port is 0.1488 Mpps. * For OC-12 POS ports, the packet forwarding rate of a line rate port is 1.17 Mpps. * For the POS port of OC-48, the packet forwarding rate of one line-speed port is 468MppS. Therefore, if we can meet the above three conditions, then we say that this switch is truly linear and non-blocking; the back-up rate of the switch is generally: Mbps, which refers to the second layer, which is used for the exchange of more than three layers. Mpps

4. The backplane bandwidth does not exist in the switch with the fixed port.
  This concept is only possible with modular switches (with scalable slots that can flexibly change the number of ports). Fixed-port switches do not have this concept, and the backplane capacity and switching capacity of fixed-port switches are equal. The backplane bandwidth determines the maximum bandwidth for the connection between each board (including boards that are not yet installed in the expandable slot) and the switching engine. Due to the different architectures of modular switches, backplane bandwidth is not fully effective at representing the true performance of the switch. Fixed port switches do not have the concept of backplane bandwidth.

Second, the exchange capacity
  It is the transmission capacity of the core CPU and bus, generally smaller than the backplane bandwidth. H3C low-end LSW switching uses the store-and-forward mode. The size of the switching capacity is determined by the bit width of the buffer (BUFFER) and its bus frequency. That is, the switching capacity = cache bit width * cache bus frequency = 96 * 133 = 12.8 Gbps H3C high-end switch exchange capacity can be equal to twice the total port capacity, total port capacity = 2 * (n * 100Mbps + m * 1000Mbps) ( n: indicates that the switch has n 100M ports, m: indicates that the switch has m 1000M ports. 3. The packet forwarding rate forwarding capability is measured by the minimum packet length. For the Ethernet minimum packet is 64BYTE, plus the frame overhead 20BYTE. Therefore, the minimum package is 84BYTE. For a full-duplex 1000Mbps interface to achieve line speed requirements: forwarding capacity = 1000Mbps / ((64 + 20) * 8bit) = 1.488Mpps for a full-duplex 100Mbps interface to achieve line speed requirements: forwarding capacity = 100Mbps / ((64+20)*8bit)=0.149Mpps Unit: Mpps (Million packets per second)

This article is from the "Snow Moon Studio" blog, please be sure to keep this source

How is the backplane bandwidth, switching capacity, and packet forwarding rate of the switch calculated? For the manufacturers, the standard is higher than the line speed forwarding.

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