How to address the arm instruction set

The ARM7 processor has two instruction sets: 32-bit ARM instruction set, 16-bit thumb instruction set.

1> ARM Instruction set: High efficiency, high code density

2> Thumb Instruction Set: has a high code density.

Note:

1. All arm instruction sets are conditionally executed, while the thumb instruction set has only one instruction with conditional execution.

2. The ARM program and thumb program can be called each other, and the state switching overhead is almost zero.

Two ARM Processor Addressing method

Addressing is the way to find the address of a real operand based on the address Code field given in the instruction. The ARM7 processor has a total of 9 basic addressing methods.

1. Register addressing

The value of the 1> operand is stored in the register, and the Address Code field in the instruction indicates the register number, which is manipulated by taking the register value directly when the instruction executes.

2> MOV R1,R2

Store the values in the R2 register in the R1 register

3. Register shift Addressing

1> operand 2 Advanced line shift operation, and then operation with the first operand.

2> MOV R0,R1,LSL #3

Move the R1 value to the left by three bits, and then put the result in R0. Equivalent to R0=r1*23

4. Register Indirect Addressing

The address code in the 1> directive gives the number of a generic register, and the operand required by the instruction is stored in the storage unit at the specified address of the register, which is the address pointer of the operand.

2> LDR R1,[R2]

The data readout in the storage unit pointed to by R2 is saved in R1.

5. Base Address addressing

The 1> base address is the addition of the contents of the base register to the offsets given in the instruction to form the valid addresses of the operands.

The 2> base address addresses the storage units used to access base attachments, and is commonly used for table and array operations.

3> LDR R2,[r3, #0X0C]

The data at the read r3+0x0c address is stored in the R2 register.

6. Multi-Register addressing

1> Multiple Register addressing transmits n register values at once, allowing an instruction to transmit any subset or all registers of 16 registers.

2> Ldmia r1! , {R2-R4,R6}

The values in the registers after R1 and R1 are read out and saved to R2-R4, and R6. Where R1 is added one at a time.

7. Stack addressing

1> stack addressing is implicit, and it uses a specialized register (heap pointer) to point to a piece of storage area (stack). The storage unit that the pointer points to is the top of the stack.

The 2> memory stack can be divided into two types

Ø growth: Grows toward the high address direction, called the increment stack.

Ø growth: Grows to a low address direction, called a descending stack.

3> is divided into the order of execution of the stack pointers

Full stack: The stack pointer points to valid data that is last pressed into the stack.

< that is, when there is data in the stack, the top pointer of the stack is added first, then the data is stacked

Ø empty stack: The stack pointer points to the next empty position to be pressed into the data.

< that is, when there is data in the stack, the data is first in the stack, and then the top pointer is added >

8. Relative addressing

Relative addressing is another form of base address addressing. A reference address is provided by the program counter PC, and the Address Code field in the instruction is the offset, and the resulting address is the valid address of the operand.

9. Immediate addressing

1> immediate addressing, the section following the opcode field is not the operand address but the operand itself.

2> MOV R0, #0XAA

The number 0XAA is immediately stored in the register R0.