In Linux or android systems, if we want to configure the gpio pin of the feisikar imx6 processor, for example, the gpio_19 pin, we should look like this:
#define MX6Q_PAD_GPIO_19__GPIO_4_5\(_MX6Q_PAD_GPIO_19__GPIO_4_5 | MUX_PAD_CTRL(NO_PAD_CTRL))
_ Mx6q_pad_gpio_1920.gpio_4_5 is defined:
#define _MX6Q_PAD_GPIO_19__GPIO_4_5\IOMUX_PAD(0x0624, 0x0254, 5, 0x0000, 0, 0)
The iomux_pad macro is a key macro defining gpio. Its prototype is:
#define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _sel_input_ofs, _sel_input, _pad_ctrl)
The iomux_pad macro has six parameters, each of which means:
Parameters |
Description |
_ Pad_ctrl_ofs |
Offset address of the control register (hexadecimal) |
_ Mux_ctrl_ofs |
The offset address of the MUX control register (in hexadecimal format) for Pin selection. |
_ Mux_mode |
MUX mode, bit0 ~ 3, ranging from 0 ~ 7 |
_ Select_input_ofs |
Select_input register offset address (hexadecimal) |
_ Select_input |
Daisy Chain Mode, bit0 ~ 1, ranging from 0 ~ 3 |
_ Pad_ctrl |
Bits to be set in register _ pad_ctrl_ofs for configuration Selection |
The specific meaning should be combined with the imx6 Data Manual Chapter 36 imoux controller (iomuxc.
The following describes the configuration of the gpio_19 pin:
1. _ pad_ctrl_ofs
Find the data manual page 2433:
We can see from the following: _ pad_ctrl_ofs = 0x624
2. _ mux_ctrl_ofs and _ mux_mode
Find the content of data manual page 2055:
For example, the value of _ mux_ctrl_ofs is 0x254, and the range of _ mux_mode is 000 ~ 110
Only when _ mux_mode is set to 0, _ select_input_ofs and _ select_input are valid. In other cases, _ select_input_ofs and _ select_input are both 0.
3. _ select_input_of and _ select_input
When _ mux_mode = 0, for the value of _ select_input_ofs, see data manual page 2654:
In this case, _ select_input_ofs = 0x8e8, _ select_input = 0x1
4. _ pad_ctrl
_ Pad_ctrl is generally set to 0.
To sum up, the configuration macro of gpio_19 is defined as follows:
#define _MX6Q_PAD_GPIO_19__KPP_COL_5\IOMUX_PAD(0x0624, 0x0254, 0, 0x08E8, 1, 0)#define _MX6Q_PAD_GPIO_19__ENET_1588_EVENT0_OUT\IOMUX_PAD(0x0624, 0x0254, 1, 0x0000, 0, 0)#define _MX6Q_PAD_GPIO_19__SPDIF_OUT1\IOMUX_PAD(0x0624, 0x0254, 2, 0x0000, 0, 0)#define _MX6Q_PAD_GPIO_19__CCM_CLKO\IOMUX_PAD(0x0624, 0x0254, 3, 0x0000, 0, 0)#define _MX6Q_PAD_GPIO_19__ECSPI1_RDY\IOMUX_PAD(0x0624, 0x0254, 4, 0x0000, 0, 0)#define _MX6Q_PAD_GPIO_19__GPIO_4_5\IOMUX_PAD(0x0624, 0x0254, 5, 0x0000, 0, 0)#define _MX6Q_PAD_GPIO_19__ENET_TX_ER\IOMUX_PAD(0x0624, 0x0254, 6, 0x0000, 0, 0)#define _MX6Q_PAD_GPIO_19__SRC_INT_BOOT\IOMUX_PAD(0x0624, 0x0254, 7, 0x0000, 0, 0)
The macro above defines ARM/ARCH/palt-mxc/include/Mach/iomux-mx6q.h from imx6 Linux source code