How to debug Makefile variables

Six or seven years ago wrote a "with me to write Makefile", until today, there are some friends asked me some makefile questions, honestly, I haven't used makefile for some time, unfamiliar. In retrospect, the problem of my problems in the past few years, in fact, many times is makefile debugging problems. So, as I did in the previous article on GDB's technique, here's a little bit of a debugging technique for you. I believe it will be useful to you.

For the various variables in the makefile, we may be more likely to have a headache. We want to see if they are not very convenient and need to modify makefile to join the echo command. This is sometimes inconvenient. In fact, we can make the following makefile, which is specifically used to output variables (assuming name: VARS.MK)

%:  @echo \ ' $*=$ ($*) \ ' d-%:  @echo \ ' $*=$ ($*) \ '  @echo \ '  origin = $ (Origin $*) \ '  @echo \ '   value = $ (value  $*) \ '  @echo \ '  flavor = $ (Flavor $*) \ '

In this way, we can use the-f parameter of the make command to see the related variables in makefile (including the built-in variables for make, such as compile.c or make_version). Note: The second target with a "D" prefix can be used to print something more detailed about the variable (explained later)

Suppose our makefile is like this (TEST.MK)

Objdir: = Objdirobjs: = $ (Addprefix $ (objdir)/,foo.o bar.o baz.o) foo = $ (bar) bar = $ (ugh) ugh = Huh? CFLAGS = $ (include_dirs)-oinclude_dirs =-ifoo-ibarcflags: = $ (CFLAGS)-wallmyobj: = A.O b.o C.OMYSRC: = $ (MYOBJ:.O=.C)

So, we can debug this:

[Email protected]]$ make-f test.mk-f var.mk objsobjs=objdir/foo.o objdir/bar.o objdir/baz.o[[email protected]]$ make-f Test.mk-f var.mk D-foofoo=huh?  Origin = File  value = $ (bar)  flavor = recursive[[email protected]]$ make-f test.mk-f var.mk D-cflagscflags=-ifoo -ibar-o  -O origin = file  value =-ifoo-ibar-o  -o flavor = simple[[email protected]]$ make-f  test.mk- F var.mk d-compile.ccompile.c=cc-ifoo-ibar-o-wall  -c origin = default  flavor = Recursive   value = $ (cc ) $ (CFLAGS) $ (cppflags) $ (target_arch)-C

We can see:

• The first-F after make is the makefile to be tested, and the second is our debug makefile.
• followed directly by the variable name, if the variable name with "D", then output more detailed things.

Say the "D" prefix (which means details), which calls the following three parameters.

• $ (Origin): tells you where this variable comes from, file represents the document, environment represents the environment variable, and environment Override,command line,override,automatic, and so on.
• $ (value): The way this variable is typed is not expanded. such as the Foo variable in the above example.
• $ (flavor): There are two values, simple is a generic expanded variable, and recursive represents a recursive expanded variable.

(End of full text)

• This article is from: Linux Learning Tutorial Network

How to debug Makefile variables