Niosii Program How to download to flash
After debugging the system, the next task is to solidify the program into nor flash (hereinafter referred to as flash) and enable it to run automatically after power-on. But what should we do? I think everyone will think of using the flash programmer of The NIOS. Yes, it is used. However, flash programmer cannot be used at will. If it is not set correctly, it cannot be used. Let's talk less about follow me.
Note: The Flash setting method has a direct relationship with the version of niosii. Here, we only use Quartus II 6.0 and nioii 6.0 as examples.
Step 1
The default target board is the unspecified board. We need to customize the target board if we want to download the content of the program to flash or Apsara stack. Click file --> new board description… in the file builder of the system .... Select the netlist box. Select the correct FPGA Series in the device Family column.
Step 2
Select the flash memory box. Click new flash memory and enter the correct model and type.
Step 3
Click new hardware image to specify the storage location of the FPGA hardware configuration program. Generally, the source and target devices are selected. If it is set to a flash device, an external device (CPLD) must be used together.
Step 4
Select files. Enter the Board description name, version, and system template. Click Finish .... Change the unspecified board to the newly created target board.
Step 5
Add components to the system and assign base address and IRQ. Note:
(A) The flash Address should start with 0.
(B) Select level 1 or higher for the JTAG debug module of the NIO processor.
(C) If you want to download the niios program to the PV, you must add the PV controller.
Step 6
Set the reset address and abnormal address in the settings of the "cpu_0" type in the niosii more. If the program is downloaded to flash, it will be reset to cfi_flash_0. If the program is downloaded to PV, it will be reset to epcs_controller.
Step 7
In board settings, set target device and device pins to assign in Quartus II project.
Step 8
System Generation + Quartus full compilation + download with the help of the system. Process omitted.
Step 9
Enable the nio ii ide. After the program is properly debugged, Click Tools> flash programmer .... Select Program FPGA configuration data into hardware-image region of flash memory and select the download location of the FPGA hardware configuration program. Click program flash.
end.