How to Implement SDRAM read/write through ADSP-BF533 ebiu Interface

 

ADSP-BF533 to realize the SDRAM read and write, BF533 to connect to the SDRAM, so I found the BF533 on the related pin, the following is the BF533 on the SDRAM interface signal and the corresponding function description:

1. Data []: external data bus;

2. ADDR [], ADDR [16]: External address bus, connected to the address pin of SDRAM. The block address is output on ADDR [] and must be connected to the BA [1:0] pin on the SDRAM;

3. SRAs: Line address pin of SDRAM, connected to the RAS pin of SDRAM;

4. SCAs: The address pin of the SDRAM column, connected to the CAS pin of the SDRAM;

5. SWE: The SDRAM write enabling pin, connected to the we pin of the SDRAM;

6. Abe [1:0]/sdqm [1:0]: SDRAM Data encapsulation pin, connected to the dqm pin of SDRAM;

7. SMS: The selection pin of the external storage block, connected to the CS (chip select) pin of the SDRAM. Low level valid;

8. sa10: SDRAM A10 pin. When the asynchronous memory controller on the CPU is using ebiu, the SDRAM interface uses this pin to update the data in the chip. Connect to the [10] pin of SDRAM;

9. scke: The Clock enabling pin of SDRAM, connected to the cke pin of SDRAM;

10. clkout: SDRAM clock enabling pin. This pin is connected to the system clock of the processor, and also to the CLK pin of the SDRAM.

Generally, the SDRAM chip has the above pins. In the circuit schematic, you only need to connect the corresponding pins to the BF533, and then use visual DSP ++ for programming to read and write the SDRAM. The following is a routine I have learned. I will use a program instance to explain how to perform read and write of the SDRAM.

Let's talk about the timing initialization of SDRAM. The procedure is as follows:

Void init_sdram (void)

{

* Pebiu_sdrrc = 0x00000817;

* Pebiu_sdbctl = 0x00000013;

* Pebiu_sdgctl = 0x0091998d;

Ssync ();

}

There are three timing initialization registers for SDRAM: pebiu_sdrrc, pebiu_sdbctl, and pebiu_sdgctl. In fact, the names of these three control registers are defined by the header file macro. In the header file cdefbf533.h, the header file cdefbf532.h is included. Open the header file cdefbf532 and you will see the following definitions:

/* SDRAM Controller */

# Define pebiu_sdgctl (volatile unsigned long *) ebiu_sdgctl)

# Define pebiu_sdbctl (volatile unsigned short *) ebiu_sdbctl)

# Define pebiu_sdrrc (volatile unsigned short *) ebiu_sdrrc)

Therefore, we actually control three registers: ebiu_sdgctl, ebiu_sdbctl, and ebiu_sdrrc. So I have a detailed understanding of these three registers. The first is sdrrc, which still enables help in visual DSP ++ for search. The following registers are found:

The rdiv value is calculated by the following formula:

The specific definition is as follows:

Different SDRAM have their own different time series, as long as they are substituted for calculation.

Next is the sdbctl register, which is the SDRAM block control register, used to control the parameter programming of the external block. It allows the software to control certain parameters of SDRAM. The content of the sdbctl register is as follows:

 

As we can know, 0th bits are external storage block enabling, and 1 bits are set to enable; 1-2 bits are external storage block size settings for SDRAM. There are four storage block sizes to choose from, 16 m, 32 m, 64 m, and 128 M byte, respectively. These two parameters are determined by the size of the SDRAM in the circuit diagram. The 4-5 characters are determined by the column address width of the SDRAM, they are 8-bit, 9-bit, 10-bit, and 11-bit.

The last is the ebiu_sdgctl register, which is used to set the interface timing configuration of the SDRAM through programming. For example, the function definition for each bit of the sdgctl register is as follows:

The specific settings should also refer to the datasheet description of SDRAM.

For the learning of the above three registers, the most important two points are to be familiar with the timing parameters of SDRAM and the Function Definition of the control register.

After we initialize the data through SDRAM, we can program and specify the Register address to read and write the corresponding register. This is actually very simple. If you have learned how to use the single chip microcomputer external memory before, it should be easy to understand. The general process is as follows: Generally, a variable A is defined and its address is specified. The read operation is to assign the value of variable A to the variable we need; the write operation is to assign the data to be written to variable A, as long as it is to take values or assign values to the SDRAM storage space, the BF533 chip automatically implements the configured SDRAM timing on the hardware to implement read/write operations. The specific read/write program is as follows:

* Paddr = 0x1234; // defines the pointer address of a variable as 0x1234.

I = * paddr; // perform a read operation and grant the content with the address 0x1234 to I

Printf ("ADDR is % x \ n", paddr );

Printf ("data is % x \ n", I );

* Paddr = 0xaa55; // assign the data 0xaa55 to the address 0x1234.

I = * paddr; // read the data back.

Printf ("ADDR is % x \ n", paddr );

Printf ("data is % x \ n", I );

The above is the learning of the BF533 ebiu interface based on the design of SDRAM. It is for reference only...

 

Program:

# Include <cdefbf533.h>
# Include <sys \ exception. h>

# Define paddr (volatile unsigned short *) 0x1000

Ex_interrupt_handler (timer0_isr );

Void set_pll (unsigned int pmsel, unsigned int pssel)
{
Unsigned int new_pll_ctl;
* Ppll_div = pssel;
ASM ("ssync ;");
New_pll_ctl = (pmsel & 0x3f) <9;
* Psic_iwr | = 0 xffffffff;
If (new_pll_ctl! = * Ppll_ctl)
{
* Ppll_ctl = new_pll_ctl;
ASM ("ssync ;");
ASM ("idle ;");
}
}

Void init_ebiu (void)
{
* Pebiu_ambctl0 = 0x7bb07bb0;
* Pebiu_ambctl1 = 0xffc07bb0;
* Pebiu_amgctl = 0x000f;
}

Void init_sdram (void)
{
* Pebiu_sdrrc = 0x00000817;
* Pebiu_sdbctl = 0x00000013;
* Pebiu_sdgctl = 0x0091998d;
Ssync ();
}

 

Void main (void)
{
Int I;
Set_pll (16, 3 );
Init_ebiu ();
Init_sdram ();

* Paddr = 0x1234;
I = * paddr;
Printf ("ADDR is % x \ n", paddr );
Printf ("data is % x \ n", I );
* Paddr = 0xaa55;
I = * paddr;
Printf ("ADDR is % x \ n", paddr );
Printf ("data is % x \ n", I );


While (1 );

}