How to Improve the Performance of Enterprise Routers

Preface

In the current enterprise network, most of the wired networks are affected by factors such as investment cost and transmission speed. Vro is an important bridge connecting local networks to external networks. It is an indispensable component in the network system and a cutting-edge entry in network security. It is very important to improve its performance.

More and more functions of current vro devices are implemented in hardware mode. The improvement of CMOS integration technology enables many functions to be implemented on the dedicated Integrated Circuit (ASIC) chip, functions originally implemented by software can now be completed by faster hardware and lower costs, greatly improving system performance. The distributed processing technology is adopted in routers, which greatly improves the routing processing capability and speed of routers. The shared-bandwidth bus, which is easy to cause congestion, is gradually abandoned, and the Exchange Routing technology is widely adopted. In the exchange structure design, the inter-network design of the giant computer is adopted or the optical switching structure is introduced. In addition, the fast search technology of Route tables, QoS Assurance, and MPLS network optimization are also being paid more and more attention to the introduction of optical switching in routers.

ASIC Technology

Because manufacturers need to reduce costs, ASIC technology has been widely used in routers. In a vro, to greatly increase the speed, the first thing you don't think of is ASIC. ASIC can be used for packet forwarding and querying routing. At present, there is a commercial ASIC chip dedicated to finding IPV4 routes. The Application of ASIC Technology significantly improves the packet forwarding speed and route search speed in the vro.

Express routers separate non-real-time tasks such as route computing and control from real-time tasks such as data forwarding. Non-real-time tasks such as route computing and control are completed by the CPU running software, and real-time tasks such as data forwarding are completed by dedicated ASIC hardware. Since the second half of 1997, some companies have successively launched new routers that use dedicated Integrated Circuits (ASIC) for route identification, computing, and forwarding. The forwarder is responsible for all data forwarding functions. This type of router uses hardware to forward data packets one by one according to the cycle of the clock to achieve line rate forwarding.

The development of ASIC Technology means that more features can be moved to the hardware, improving the performance and adding features. Compared with software execution, ASIC has three times the performance of the latter. However, all-hardware vrouters lack flexibility and take some risks because the standard specification is still evolving, so programmable ASIC is emerging. Programmable ASIC is the development trend of ASIC because it can adapt to network structure and protocol changes by rewriting microcodes. Currently, there are two types of Programmable ASIC: one is represented by the Flexible Intelligent Routing Engine chip of 3Com, and the other is represented by the HISC dedicated chip of Vertex Networks, this chip is a dedicated CPU designed for communication protocol processing. By Rewriting the microcode, the chip has the ability to process different protocols.

Distributed Processing Technology

The original router adopted the traditional computer architecture, including the shared central bus, central CPU, memory, and multiple network physical interfaces mounted on the shared bus. The interface card sends packets to the CPU through the bus, and the CPU completes route calculation, query table, and forwarding decision processing, and then sends the packets to another physical interface through the bus. The main limitation of a Single-bus single CPU is that the processing speed is slow. A single CPU completes all the tasks, thus limiting the system throughput. In addition, the system has poor fault tolerance. If the CPU fails, the system may be completely paralyzed. All of this makes it difficult to greatly improve the forwarding performance of traditional routers.

Modern routers adopt distributed processing for packet forwarding, and can insert multiple line processing boards. Each circuit board completes the forwarding process independently, that is, each interface has an independent CPU, it is responsible for receiving and sending the interface data packets separately, managing the receiving and sending queues, querying the route table, and making forwarding decisions. The core switching board is used to realize non-blocking exchange between boards. That is, after a packet input on a board is routed, it can be exchanged to another board for output as directly connected through a wire, the throughput of the entire machine can be multiplied. The master CPU only provides non-real-time functions such as vro configuration control and management. The advantage of this architecture is that the local forwarding/filtering of data packets is determined by the dedicated CPU processed by each interface, and the packet processing is distributed to each interface card. The circuit board has a dedicated chip to complete forwarding on the second, third, and fourth layers. The hardware enables forwarding to reach the line speed (the speed of the connection link of the high-speed port ), it achieves the same performance as circuit switching, so that the router will not become a bottleneck in the network.

However, the biggest drawback of a Single-bus router is that only one group can be switched from the entry to the exit at a time. If multiple data transmission channels exist between the entry and exit, this problem can be solved and the system throughput can be greatly improved. Based on this idea and the advantages of the ATM switch structure, a new generation router architecture based on the switch structure is proposed.

Fast search technology for Route tables

As the number of computers on the Internet rapidly increases and users' demand for bandwidth increases, the quick search of Route tables has become the most urgent problem. Traditional software-based routing search strategies, such as tree or hash algorithms, are executed slowly and associated with the route table size. Therefore, these methods can only be used for packet forwarding applications with relatively small performance.

The route table compression technology is used to compress the route table according to specific distribution rules and store it in the high-speed cache of the processor. This greatly improves the query speed. However, the highly optimized and compressed data structure requires more register access and processor cycles to update route tables. This value also increases when the route table increases. When the route table is updated, the entered data packets must be cached or discarded, reducing the performance of the router.

In addition, the uncertainty Based on the software search and Update route table increases the jitter during packet transmission. Therefore, the packet must be cached, resulting in packet loss at a high rate. Therefore, in order to adapt to the development of the network, the ideal packet forwarding solution must not only ensure the data forwarding rate at line speed, A large enough route table must be provided to meet the needs of next-generation routing devices (up to 512 K at the boundary position ). At the same time, it also needs to be able to handle long-time burst route table updates with a small update latency. Although the route table is updated several hundred times per second, sudden updates may be much higher.

To solve this problem, the most effective method is to use a dedicated coprocessor combined with the Content addressing register CAM (Content addressable memory) solution and cache solution to complete fast Route Search or update. However, the core router requires a large forwarding table. Therefore, for the core router, the cache is only an auxiliary method. A large enough cache is required to store the entire forwarding table, and fast algorithms are still required, logical controllers and memories can also be integrated into a single device to shorten Memory Access time.

QoS

QoS is short for Quality of Service. The IP protocol has a long delay and is not a fixed value. packet loss leads to discontinuous signals and distortion. Therefore, the application of IP addresses to transmit multimedia information is limited. QoS support for IP networks is the main direction of the next-generation Internet technology development. The degree of QoS supported by routers has also become a major indicator for evaluating the performance of routers. QoS has two main implementation frameworks: IS (Integrated Service) and DiffServ (Differentiated Service ).

IS application Resource Reservation Protocol (RSVP) establishes a sending channel and Reserves Resources before real-time service sending. It notifies each node (IP router) passing through a data stream, and negotiates with the endpoint to reserve resources for this data stream. However, RSVP serves as the target for negotiation of each data stream. When network traffic increases explosively, the number of data streams forwarded by routers increases dramatically, there is no way for a vro to reserve complex resource protocols for each data stream. In addition, when the route is modified due to busy lines or router faults, a relatively time-consuming RSVP process needs to be re-performed.

DiffServ is a decentralized control policy. Its workflow is to obtain the Service Level that can be guaranteed by the application data flow of a terminal device through SLA (Service Level Agreement) and edge router negotiation. Based on the service level, the edge router marks each received packet with a higher level, while the core router only determines the transfer behavior during Forwarding Based on the service level mark of each packet.

MPLS Technology

Multiprotocol Label Switching (MPLS) is an organic combination of ATM Label Switching and IP routing protocols.

Establishes the ing between the IP route table and the label forwarding table of MPLS through the mpls ldp protocol, and establishes a label switching path (LSP) for the traffic through the MPLS network based on the ing information) -- topology-driven or data-driven. The so-called topological driving mode is to create a label switching path through the MPLS network for each route entry in the route table, the data-driven approach is to create a label exchange path through the MPLS network for the route table entry of the datagram's destination only when the datagram reaches the MPLS network.

The MPLS network consists of several LER and LSR. The LER and LSR usually have both IP and MPLS functions. Based on the established tag path, the IP datagram into the MPLS network is marked, forward to the next LSR. The LSR checks the label forwarding table of MPLS and replaces the mark of the datagram with the mark in the label switching path. The LSR continues to be forwarded to the subsequent LSR until it reaches the edge LER of the MPLS network, LER removes the mark of the datagram and forwards the packet down by IP datagram.

The advantage of MPLS is that it converts the completely connectionless packet switching mode in IP technology into a "soft" Packet Switching Mode in MPLS (marking the switching path based on the LDP protocol, first, the number of times the IP route table is queried through the MPLS network is reduced, instead of the query tag forwarding table, which improves the forwarding efficiency; second, the out-of-order problem of TCP data passing through the IP network is solved (the traffic will pass through the network along the same path in the case of no fault at all network contacts, and will leave the network in the order of entering the network ), this reduces the latency of data sorting at both ends of end-to-end communication, enabling MPLS networks to serve real-time applications.

Optical Router

With the rapid development of the Internet and the explosive growth of Internet data traffic, it is urgent to expand the network capacity in terms of network connections. Synced optical fiber network (SONET) is unable to withstand the huge traffic volume of the Internet. Dense Wavelength Division Multiplexing (DWDM) technology emerged, and backbone networks will enter the era of all-optical networks in the future. Because the bandwidth of the whole optical network is huge and the processing speed is high, the router will inevitably develop towards a higher transmission rate and larger transmission bandwidth. In addition, it should also solve the problems of QoS, traffic control, and high price that previously plagued people by routers for a long time.

Optical router is a good solution. The optical router is a wavelength Selection Device under the control of MPLS protocol and wavelength selection protocol (WaRP) between the core optical wavelength channels of the network. This achieves Routing Switching and quickly forms a new optical path. Wavelength selection is determined by the internal crossover matrix. a n × N crossover matrix can be used to establish N × N routes at the same time, the wavelength conversion crossover connection connects any wavelength on any optical fiber to any optical fiber with different wavelengths for high flexibility.

At present, telecom equipment suppliers (TEP) and IP equipment suppliers (IEP) at home and abroad are stepping up the development of a series of optical switching/Optical routing products. Optical router products mainly include Cisco's ONS15900 optical router, Corvis's CoreWave optical router, and Monterey Networks's Monterey 20000 Wavelength Router.

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