How Uboot works in Nandflash and Norflash

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Electronic products without electricity, it is no different from waste, electricity is given to their lives, but the program is their soul.

As a child has been very curious, a rigid electronic products why a power after you can work it? Why is a tiny chip able to run the program we write? How does a development board run from just power-up to the entire operating system? These things have been bothering for a long time, the reference to a lot of information now slowly figure out some of the principles.

Most of the electronic products we are in touch with are designed using digital circuits, the essence of which is two numbers: 0 and 1, and these two digitally diverse combinations create a colorful computer world in which the CPU, memory, and other peripherals are recorded, interacted, and calculated through the changes of 0 and 1. Hardware is how to operate these two numbers and how the two numbers are how to control the hardware work, there is no discussion, it is some diodes, transistors, and non-gate, signal amplification sampling and other knowledge, so here will be a functional complete chip, from power up, They perform various operations through electrical signals to parse the process. If you have played a single-chip computer students should know that a CPU plus a power supply, and then an external crystal can be made into a minimum system, the microcontroller can be in his poor 64k or 128k memory running up, these simple control chip although it has its existence value, However, it does not meet the increasingly complex computational requirements, so it requires faster operation and greater memory, so we use more complex processors such as MIPS, ARM, etc. The following will use the ARM s3c2440 processor to analyze the power-up process.

As an embedded product, its diversity makes it more playable and easier to adapt to different needs, unlike our PC boot mode is relatively single (Rom boot),arm boot mode from Norfalsh boot, nandflash boot, SD card boot and UBS start -up, but their start-up principle is very similar.

Before you begin, let's clarify a few concepts :

SDRAM (Synchronous dynamic random access memory): synchronous RAM, synchronous refers to the memory work requires a step clock, internal command delivery and data transmission are based on it Dynamic means that the storage array needs constant refresh to ensure that the data is not lost, and that the data is not stored in linear order, but that the data is read and written by the specified address, in short, it is the external memory used by the CPU, that is, the memory bar we often say .

SRAM is the abbreviation of English static RAM, which is a kind of memory with still access function, it can save the data stored in it without flushing the circuit, it is faster than SDRAM and is generally used as buffer memory (cache).

Norflash: Non-slipped, is an external storage medium, in-Chip execution (Xip,execute in place), so that the application can be run directly in Flash flash memory , no longer have to read the code into the system RAM, Because it has address bus, the CPU can directly from the Norflash, run the program directly from Flash, but the process is complex, the price is more expensive, the capacity is small (1~4m), nor the transmission efficiency is very high

Nandflash: It is also a non-easy slipped storage (power loss is not lost), but although it has a data bus, but there is no address bus , so the CPU can not directly from the Nandflash to run, because it is cheap, So it's often used to store large amounts of data, similar to what we often call hard drives.

The following will resolve Nandflash startup and Norflash startup (arm s3c2440), and the other boot methods will be analyzed in the Uboot code section.

First, Nandflash start

must first write a correct bootload to the lowest position of the Nandflash, starting from 0x000 to burn . When we choose to start the Development Board from the Nandflash, the board will start to connect the Nandflash circuit structure, when the Development Board is power on, the NAND flash controller will automatically put NAND The first 4K data on the flash is moved into the internal ram of the CPU (Sram-cache), which we often call stepping stone, while mapping this in-chip SRAM to the space of the NGCS0 chip selection (i.e. 0x00000000), theCPU starts (executes) from the 0x00000000 position of the internal RAM, and the process does not require program interference .

This process is the stage1of the startup process, which copies the first 4 contents of Nandflash to Stepping stone, and then starts with stepping Stone's first instruction, The instructions in this 4k content will complete the following actions :

1. Hardware Device Initialization

2. Load U-boot Second stage code to SDRAM space

3. Set up a good stack

4. Jump to the second stage stage2 code entry

From what we can see, the memory mapping relationship after the board reset. You can see the following points:

1. Just start Bank0~bank5 is only mapping srom, and Bank6 and bank7 to be able to connect SDRM, and each bank maximum 128M sdrm, so decided to s3c2440 the largest external SDRAM is 256M;

2. We can see that the starting address of the BANK6 is 0x3000_0000, so we need to put the Uboot code into the 0x3000_000~0x4000_ when we execute the second action of the Stage1 (loading the u-boot second stage code into the SDRAM space) Within 0000 interval (SDRAM), the STAGE2 can be performed normally from SDRAM;

3. when there is no option to boot from Nandflash , boot internal SRAM (4k) Start address is 0x4000_0000 When selected from Nandflash boot , boot internal The start address of SRAM (4k) is 0x00, because our development board does not have an external srom, so bank1~bank5 are idle, and Bank0 's location will be replaced by boot internal SRAM (4k), That is to say Bank0 's front 4k is stepping stone (starting stone), the board after power, in the Nandflash startup mode, s3c2440 on the hardware will be completed in the address map, and automatically nandflash in the first 4k copy to stepping Stone and obtains the first instruction from stepping Stone's start address (0x00) and executes it.

After the above analysis, we can merge the above two graphs into the following:

I said before. Nandflash the first code removal during the boot process, the following will resolve the second code removal, the 4k code will first set the CPU run mode, close the watchdog, set the clock, off interrupt, initialize the memory, initialize the Nandflash, set the stack, The entire bootload is then transported to the SDRAM and jumps to the SDRAM for execution.

The basic process is as follows:

The execution of the 4k code will be explained in detail later, and in the new uboot-2015, this 4k code is done by Uboot_spl.bin, and the following is an overview of the entire process of uboot from power-up to boot-up based on uboot-2015.10 :

Second, Norflash start

In fact, understand the Nandflash start mode, Norflash start is also good understanding, the first thing to know is that Norflash is able to execute code on the chip (XIP), that is, We only need to write the bootload to the start address of the Norflash , when the board is power-up, from the memory map can be known,nor Flash will be mapped to the 0x00000000 address (that is, nGCS0, There is no need for on-chip SRAM to assist, so the initial address of the on-chip SRAM is still 0x40000000, will not change), and then the CPU starts from 0x00000000 (that is, executes in norfalsh) the entire uboot until the boot kernel boots.

Starting from Norflash can be much easier, not only that, our own bare-metal program needs to be debugged, generally also directly burned to Norflash, because as long as we put the compiled executable file to the beginning of the Norflash , The power of the board will be taken from the first instruction of Norflash, and the debugging of the bare-metal program behind us is done in this way.

Starting from the Norflash from the development of the point of view will be very convenient (in fact, not much convenience), but from the angle of the product has increased its cost, after all, Norflash is relatively expensive, we clearly as long as a nandflash is enough to start the entire Development Board, There is no need to add a piece of norflash in the product, as long as the code changes can save a lot of costs, he le. And Nandflash is essential to the product, because the back also to store the kernel and file system, at least dozens of megabytes of space, with Norflash to store is not realistic.

Perhaps you will think, can only use Norflash, do not nandflash and SDRAM line, after all, Norflash can be stored, can also run the program Ah, from the theory is possible, but to understand their market prices, operating speed and working principle, You should know the answer.

Summarize

Here are just two ways to start, and other start-up methods will be analyzed in the Uboot code, this article is just a primer and an overview, the following will be specific analysis of how a development board from a scrap of electricity after the embodiment of its value, please look at the following article, Learn what the top 4k code in Bootload has done!

How Uboot works in Nandflash and Norflash