1.
. (1) No addressing now
(2) direct addressing 7237 H
(3) No register addressing using BX
(4) using BX indirect addressing 637dh
(5) use the Bx register to address the 0d5f0h
(6) base address addressing 8e18h
(7) change the relative base address to FH
2. Write the corresponding Assembly command according to the following requirements.
(1) Add dx, BX
(2) Add Al, [BX] [Si]
(3) add [BX] [0b2h], CX
(4) mov ax and 2a59h add [0524 H], ax
(5) add Al, 0b5h
3.
(1) Register indirect addressing
MoV BX, offset [block] [0ah]
MoV dx, [BX]
(2) Register relative addressing
MoV Si, OAH
MoV dx, [block] [Si]
(3) base address addressing
MoV BX, Block
MoV Si, OAH
MoV dx, [BX] [Si]
No one looks at it, but I still need to write it ~~
4. Existing (DS) = 2000 h, (BX) = 0100 h, (SI) = 0002 h, (20100) = 12 h, (20101) = 34 h, (20102) = 56 h, (20103) = 78 h, (21200) = 2ah, (20201) = 4ch, (21202) = b7h, (21203) = 65 h, note the contents of the ax register after the following commands are executed.
(1) mov ax, 1200 h 1200 h
(2) mov ax, BX 0100 H
(3) mov ax, [1200] 4c2ah Note: it is a cell !!
(4) mov ax, [BX] 3412 H same as above
(5) mov 1100 [BX] 4c2ah
(6) mov ax, [BX] [Si] 7856 H
(7) mov ax, 1100 [BX] [Si] 65b7h
5.
(1) 7cd9h (2) 1200 H (3) 6319 H
6. MoV BX, 2000 h
Les Di, [BX]
MoV ax, ES: Di
7. The value of the redirection address obj is: (1) 064dh (2) 0691 H (3) 05e0h pay attention to the symbol bit of the number of symbols ~~
8. (1) mov ax, 0abh no physical address
(2) mov ax, BX register addressing is the same as above
(3) mov ax, [100] direct addressing 20100 H
(4) mov ax, Val direct addressing 20050 H
(5) mov ax, [BX] register indirect addressing 20100 H
(6) mov ax, ES: [BX] direct addressing 21100 H
(7) mov ax, [BP] registers indirectly addressing 20010 H
(8) mov ax, [Si] Same as 200a0h
(9) mov ax, [bx + 10] register relative addressing 20110 H
(10) mov ax, Val [BX] Same as 20150 H
(11) mov ax, [BX] [Si] base address addressing 201a0h
(12) mov ax, Val [BX] [Si] 201f0h
9.
(1) commands: mov ax, [BX] [0ch] mov zreo, ax
(2) commands: mov ax, array [BX] mov zreo, ax
10. MoV ax, table sends the contents in the table of the symbolic address to ax. After the command is executed, (ax) = 1234 H
Lea ax, table is to send the valid address of the symbol address table (here is the offset) to the specified register ax, refers
After the execution, (ax) = 0032 H
11. After the command is executed, (ax) = 1e00h
12. Lea ax, cstring
MoV DL, ax
MoV DH, [ax + 6]
13. This, graph, is very troublesome, so we will not draw it ~~ You can take a look at the textbooks on the P51--P53, very clear, read this article will also ~~~
14. Les BX, [2000]
MoV ax, ES: [BX]
Note: At the beginning, I wrote mov ax, ES: [8000 h]. Later I saw two instructions in the question, so I couldn't do either of them, so I had to draw a snake ~~~
15. Operation Result SF, ZF, CF, of values (from left to right ~)
(1) 74d4h 0 0 0 0
(2) a5c1h 1 0 0 1
(3) 4240 H 0 0 1 0
(4) 0000 h 0 1 1 0
16. Connect table ~
(1) 5d14 0 0 0 0
(2) a870 1 0 0 1
(3) d870 1 0 0 0
(4) 34e4 0 0 1 0
17.
(1). mov ax, Z; send Z to ax
Sub ax, X; Z-X
Add ax, W; W + (Z-X)
MoV Z, ax; the result is saved in Z
(2). mov ax, R; R is sent to ax
Add ax, 9; R + 9
MoV BX, X; X is sent to BX
Add Bx, 6; x + 6
Add ax, BX; (R + 9) + (x + 6), and save the result in ax.
MoV BX, W; W to BX
Sub BX, ax; W-(R + 9)-(x + 6), subtract two numbers consecutively, which is equivalent to subtracting the sum of the two numbers ~~
MoV Z, BX; the final result is sent to Z
(3)
MoV ax, W; send W to ax
Imul X; W * x note: the lower sixteen bits are stored in ax, and the higher sixteen bits are saved in dx.
MoV BX, Y; send y to BX
Add Bx, 6; y + 6
Idiv BX; (w * X)/(Y + 6) Note: The commercial guarantee exists in ax, and the remainder is saved in dx.
MoV Z, ax; deliver suppliers to Z,
MoV R, DX; sends the remainder to R
(4)
MoV ax, W; send W to ax
Sub ax, X; W-X
CWD: expands the number of sixteen bits in ax to 32 bits, and stores the lowest 16 bits in ax.
; In DX
MoV BX, 5; send 5 to BX
Idiv BX; (W-X)/5 divisor is 32 bits, division is 16 bits quotient is 16 bits
Imul y; the result in the previous step is Y, and the product is 32 bits.
MoV BX, 2; send 2 to BX
Imul BX; the product obtained by multiplication in the previous step is multiplied by 2, each of which is 64 bits
MoV Z, eax; put the mid and low 32 bits in the result into the Z dual-cell.
MoV [Z + 4], EDX; put 32-bit high in the result into Z + 4 dual-Cell
18.
The value of CF, SF, and ZF after the ax content is executed.
MoV ax, 1234 H 1234 H 0 0 0
MoV cl, 4 1234 H 0 0 0
Rol ax, CL 2341 H 1 0 0
Dec ax rrrrrr 2340 H 1 0 0
MoV CX, 4 2340 H 1 0 0
Mul CX 8918 H 0 0 0
INT 20 h
After the program ends, (ax) = 8918 H (dx) = 0000 h
19.
The CF, SF, ZF, and of values after the ax content is executed
MoV ax, 0 0 0010
Dec ax ffffh 0100
Add ax, 7 fffh 7 ffeh 0000
Add ax, 2 8000 h 0101
Not ax 7 fffh 0101
Sub ax, 0 ffffh 8000 h 1101
Add ax, 8000 h 0000 h 1011
Sub ax, 1 ffffh 1101
And ax, 58d1h 58d1h 0000
Sal ax, 1 b1a2h 0101
SAR ax, 1 d8d1h 0100
Neg ax 272fh 1000
Ror ax, 1 9397 H 1001
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