Implementation of Embedded WEB Data Server Based on TMS320VC5409

Implementation of Embedded WEB Data Server Based on TMS320VC5409

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Source: Electronic Technology Application Author: Gao Xiang, Li Ling, Liu guangcun

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In high-speed embedded applications, the I/O interface speed and protocol processing speed of common single-chip microcomputer [1] often become the bottleneck of network data transmission, therefore, it is not a proper design choice. The main processor in these systems usually has a fast processing and interface speed. connecting these fast interfaces with the Ethernet control chip can achieve network applications that meet certain data transmission rate requirements. Based on the TMS320VC5409 digital signal processor [2] and RTL8019AS ethernet controller [3], this paper designs a Fast Ethernet interface suitable for transmitting large amounts of data collected by sensors and post-processing information, in addition, the embedded WEB data server is implemented by porting and applying the lwIP TCP/IP protocol stack [4.
1 Ethernet controller RTL8019AS [3]
At present, Ethernet technology has developed to a Gigabit bandwidth speed in computer systems, but most Ethernet interface chips are connected to the CPU through the PCI bus. In an embedded system, unless the High-speed processor in the system has a PCI interface, it is generally difficult to directly connect to such chips. From the perspective of economy and efficiency, it is appropriate for Embedded Systems to adopt a relatively slow 10 M Ethernet interface chip RTL8019AS. RTL8019AS is a widely used low-cost Ethernet interface controller. It has an ISA bus interface with the CPU and can be easily connected to external interfaces of various processors. The chip has the following features:
(1) conforms to Ethernet II and 802.3 10Base5, 10Base2, 10 BaseT;
(2) Full Duplex. The sending and receiving rate can reach 10 Mbps at the same time;
(3) built-in 16 kb SRAM for sending and receiving cache loops to reduce the speed requirements for the master processor;
(4) supports 8/16-Bit Data Bus, 8 interrupt request lines, and 16 optional I/O base addresses;
(5) Supports automatic detection by UTP, AUI, and BNC interfaces. In addition, the Integrated 10BaseT transmission interface supports automatic polarity correction by connecting to the receiving line pair;
(6) supports programmable output of four diagnostic LED pins.
2 interfaces of TMS320VC5409 and RTL8019AS
2.1 C5409 features of the External Bus Interface [2]
C5409 external bus interface is the main channel for connecting to a variety of external devices. Using various control signal pins on the external bus, C5409 can map access to external interfaces to access data storage space, program storage space, or I/O space. When mapped to a bucket, the interface's data recovery rate can reach the CPU running frequency, that is, 100 MHz, 10ns is an access cycle, and mapped to the I/O space, the shortest speed can reach an access cycle of 20 NS, which is sufficient to meet the speed requirements for accessing the ISA bus (the fastest isa I/O write speed of RTL8019AS is 50 MHz, and the reading speed is lower ). You only need to map RTL8019AS to the I/O space. In addition to data and address bus, the main control signals for I/O space access are IS #, R/W #, and IOSTRB.
2.2 C5409 connection with RTL8019AS
The specific interface 1 is shown. To simplify the system, you can configure RTL8019AS in jumper mode. You can directly jumper at the configuration pin or use the C5409 I/O pin to simulate the configuration level, this eliminates the need to configure an external 9346 chip. It should be noted that the I/O pin of C5409 is used to simulate the configuration. The reset signal RSTDRV of RTL8019AS needs to be lowered at last, because the configuration Signal status is locked at the descent edge of the RSTDRV.

(1) Although there are 20 RTL8019AS address buses, SA0 ~ This ensures that the I/O base address of RTL8019AS is H ~ 300 H, occupying 32 bytes of space after the base address.
(2) The data bus is a bidirectional bus, and the level matching problem between chips needs to be considered. C5409 is a 3.3V interface device, and the RTL8019AS interface level is 5 V. Therefore, you must add a drive chip compatible with 3.3V and 5 V levels on the bus, such as LVTH16245A. In addition, the interrupt and READY signals output from RTL8019AS to C5409 also need to be matched through the driver chip. The interrupt signal is flipped through non-door.
(3) because C5409 does not have a separate read/write control signal, it is necessary to use the decoding method to connect with RTL8019AS. The IORB and IOWB signals of RTL8019AS can be obtained through signal Decoding of dsp is #, R/W #, and IOSTRB #. A fast decoding chip IS needed to meet the timing requirements of the control signal.
(4) JP pull height indicates that the device is working in jumper mode, IOCS16B pull height indicates that the width of the configured Data Bus is 16 bits, and the AEN driver is low. RSTDRV, the reset signal of RTL8019AS, is directly controlled by the XF pin of DSP.
2.3 C5409 control and read/write of RTL8019AS
(1) initialize RTL8019AS. First, on register page 0, configure the three pointer registers BNRY, PSTART, and PSTOP to define the receiving cache ring, and clear the Enable interrupt by configuring the registers ISR and IMR, configure the physical address register PAR0 ~ on register page 1 ~ PAR5, multicast address register MAR0 ~ MAR7 (the AM value of the RCR register is 0 and the MARx value does not need to be configured) and the current page pointer register CURR, and finally return to the register page 0, initialize the Data configuration register DCR, receive the configuration register RCR, send the configuration register Cr, and write the start command to the control register.
(2) receive Ethernet frames. After the chip receives a complete ethereum frame and verifies it correctly, it sends out a PRX bit of the interrupt and reset Status Register ISR and RSR, indicating that it correctly receives a frame of Ethernet data. In this case, the DSP can read the Ethernet data frame from the receiving cache ring in the chip through the remote DMA channel RTL8019AS. Before each received Ethernet data frame, RTL8019AS writes the receiving status and next packet (that is, the next Ethernet frame) to the first four bytes in the receiving cache of this frame) the cache header pointer, the number of bytes of the current received frame, and other information. In 8-Bit mode, 2 is shown. The Byte Length includes the received 4-byte verification data. The receiving process is controlled by three registers: BNRY, RBCR0, and RBCR1. The BNRY register points to the starting address of the homepage of the data frame to be received in the cache ring, RBCR0 and RBCR1 specify the length of the data to be received. The DSP initializes these three registers and sends the "Remote read" command to RTL8019AS to read the data from the cache ring. The Remote DMA channel automatically controls the read start address and length based on the three registers. In addition, you can use the "Send Packet" command to receive data. At this time, the BNRY, RBCR0, and RBCR1 registers are automatically initialized.

(3) Send an Ethernet frame. The sending process is controlled by four registers: CRDA0, CRDA1, RBCR0, and RBCR1. The CRDA0 and CRDA1 registers point to the starting address of the data frame to be sent and to be written to the cache ring, RBCR0 and RBCR1 specify the length of the data to be sent. The DSP initializes these registers and sends the "Remote write" command to RTL8019AS to write the data to the cache ring. The Remote DMA channel automatically controls the Write Start address and length based on three registers. To send data frames to Ethernet, the DSP only needs to set the TXP of the control register CR to 1. RTL8019AS will automatically complete data verification and send.
3. TCP/IP protocol implementation
Due to the limitation of processing resources and real-time requirements on embedded hardware, the implementation of TCP/IP protocol is different from that on the general computer, requiring as little storage space as possible, the processing speed is fast enough. Therefore, you must crop and optimize the TCP/IP protocol based on the characteristics of applications.
There are two main embedded implementations of the common TCP/IP protocol. One is the TCP/IP protocol stack based on various real-time operating systems, such as VxWorks μC/OS-II, μC Linux, CMX-RTOS and other embedded real-time operating systems are embedded or have configurable TCP/IP protocol stack implementation module; another method is to implement it directly on embedded hardware, such as the TCP/IP protocol stack designed by Microchip for its PIC microcontroller. Direct implementation is a good choice for systems with simple processing tasks and high real-time requirements. In this system, select the open-source software LWIP (a light-weight Implementation of the TCP/IP protocol suite) based on the characteristics of the specific application) [4] After appropriate cropping, It is transplanted to the c5409 DSP, and the IP address, ARP, TCP, ICMP protocol and Ethernet driver are directly implemented. The code length is 28kb and the data space is 9kb.
The interface between the application layer and the LWIP protocol stack can be either through calling the lwip api function or directly calling the implementation module of the Protocol, that is, using the original API function. The lwip api function provides upper-layer applications with a programming mode that uses the Protocol Stack's normal sequence, namely, based on the "open-read-write-Close" mode, which is a type of BSD Socket API. The original API is an application interface based on the callback mechanism. Calling this interface makes the application layer more closely connected with the LWIP protocol stack, application programmers are required to have a better understanding of the underlying mechanism of LWIP. Therefore, programming is more difficult and program code is more difficult to understand. However, the benefits are also obvious-the processing speed is faster and the memory usage is smaller, which makes sense for small systems.
4. Embedded WEB Data Server Applications
The system calls the original application layer interface of the protocol stack to implement embedded WEB data server applications, as shown in principle 3. The function is to store the data collected by the sensor or the information after data processing in a pre-agreed format in the data cache, each time you receive the "Get AE" command from a host on the network, the processing result is sent. The AE _init function is used to start the data service application during initialization. When a TCP connection is established, the AE _accept function is used to register the application layer processing function in the Protocol control block PCB, each time a connection is established, it is called by the protocol stack. AE _recv is an actual application layer processing function. Each time an application layer command is received from the corresponding connection, the protocol stack will call it to make appropriate processing and response, which is mainly used to transmit sensor data or information to the client host. Without optimization, the system can reach a transmission rate of at least Kbps in a LAN that is working normally (with external Internet connections), basically meeting the design requirements. To further increase the transmission bandwidth, you can use a m or higher speed Nic chip to interface with the DSP.

It is difficult to implement Ethernet interfaces in embedded systems: first, there are few suitable interface chips, and the cost of the integrated solution (that is, the embedded Ethernet interface of the processor) is relatively high; the second is the implementation of the TCP/IP protocol stack. With the development of embedded system network applications, the first difficulty will be gradually solved with the development of chip technology, and for the second difficulty, using open source code is an economical and suitable choice. Currently, for most applications, the system in this article is a feasible low-cost solution that can meet certain data transmission rate requirements, and because the C5409 DSP interface also has a wide margin, the system has high scalability and can connect to an Ethernet chip with a higher transmission rate. The embedded WEB data server designed in this paper has been used in an AE sensor data collection and analysis system and achieved the expected results.
References
[1] Cao Yu, Wei Feng, Hu Shiyi. Use 51 Single-Chip Microcomputer to control RTL8019AS for Ethernet communication. electronic technology application, (1): 21-23.
[2] TMS320VC5409 Fixed-point digital signal processor datasheet. Texas Instruments Inc, 2000.
[3] RTL8019AS datasheet. RealTek semiconducorp, 2005, 8.

[4] Adam Dunkels. Design and implementation of the lwIP TCP/IP stack. http://www.sics.se/

~ Adam/lwip/doc/lwip.pdf, 2001, 2.